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Fix an assertion caused by using inline asm with indirect register inputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204425 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6185,7 +6185,7 @@ static void GetRegistersForValue(SelectionDAG &DAG,
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// types are identical size, use a bitcast to convert (e.g. two differing
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// vector types).
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MVT RegVT = *PhysReg.second->vt_begin();
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if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
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if (RegVT.getSizeInBits() == OpInfo.CallOperand.getValueSizeInBits()) {
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OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
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RegVT, OpInfo.CallOperand);
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OpInfo.ConstraintVT = RegVT;
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16
test/CodeGen/ARM/inline-diagnostics.ll
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16
test/CodeGen/ARM/inline-diagnostics.ll
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@ -0,0 +1,16 @@
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; RUN: not llc %s -verify-machineinstrs -mtriple=armv7-none-linux-gnu -mattr=+neon 2>&1 | FileCheck %s
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%struct.float4 = type { float, float, float, float }
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; CHECK: error: Don't know how to handle indirect register inputs yet for constraint 'w'
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define float @inline_func(float %f1, float %f2) #0 {
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%c1 = alloca %struct.float4, align 4
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%c2 = alloca %struct.float4, align 4
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%c3 = alloca %struct.float4, align 4
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call void asm sideeffect "vmul.f32 ${2:q}, ${0:q}, ${1:q}", "=*r,=*r,*w"(%struct.float4* %c1, %struct.float4* %c2, %struct.float4* %c3) #1, !srcloc !1
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%x = getelementptr inbounds %struct.float4* %c3, i32 0, i32 0
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%1 = load float* %x, align 4
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ret float %1
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}
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!1 = metadata !{i32 271, i32 305}
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