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[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions

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Differential Revision: http://reviews.llvm.org/D5204


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224785 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jozef Kolek
2014-12-23 19:55:34 +00:00
parent 6a9ef539c6
commit c623d0af3d
9 changed files with 122 additions and 7 deletions
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9
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
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@@ -1376,6 +1376,15 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
if (Imm < 0 || Imm > 60 || (Imm % 4 != 0))
return Error(IDLoc, "immediate operand value out of range");
break;
case Mips::CACHE:
case Mips::PREF:
Opnd = Inst.getOperand(2);
if (!Opnd.isImm())
return Error(IDLoc, "expected immediate operand kind");
Imm = Opnd.getImm();
if (!isUInt<5>(Imm))
return Error(IDLoc, "immediate operand value out of range");
break;
}
}