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[PowerPC] Use VSX vector load/stores for v2[fi]64

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These instructions have access to the complete VSX register file. In addition,
they "swap" the order of the elements so that element 0 (the scalar part) comes
first in memory and element 1 follows at a higher address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204838 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
2014-03-26 18:26:30 +00:00
parent 50c385683c
commit c6940d4cb7
3 changed files with 49 additions and 0 deletions
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36
test/CodeGen/PowerPC/vsx.ll
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@@ -296,3 +296,39 @@ define <2 x i64> @test27(<2 x i64> %a, <2 x i64> %b) {
; CHECK: blr
}
define <2 x double> @test28(<2 x double>* %a) {
%v = load <2 x double>* %a, align 16
ret <2 x double> %v
; CHECK-LABEL: @test28
; CHECK: lxvd2x 34, 0, 3
; CHECK: blr
}
define void @test29(<2 x double>* %a, <2 x double> %b) {
store <2 x double> %b, <2 x double>* %a, align 16
ret void
; CHECK-LABEL: @test29
; CHECK: stxvd2x 34, 0, 3
; CHECK: blr
}
define <2 x i64> @test30(<2 x i64>* %a) {
%v = load <2 x i64>* %a, align 16
ret <2 x i64> %v
; CHECK-LABEL: @test30
; CHECK: lxvd2x 34, 0, 3
; CHECK: blr
}
define void @test31(<2 x i64>* %a, <2 x i64> %b) {
store <2 x i64> %b, <2 x i64>* %a, align 16
ret void
; CHECK-LABEL: @test31
; CHECK: stxvd2x 34, 0, 3
; CHECK: blr
}