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r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -105,7 +105,7 @@ getModuleMatchQuality(const Module &M)
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// Install an instruction selector pass using
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// the ISelDag to gen Mips code.
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bool MipsTargetMachine::
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addInstSelector(PassManagerBase &PM, unsigned OptLevel)
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addInstSelector(PassManagerBase &PM, bool Fast)
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{
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PM.add(createMipsISelDag(*this));
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return false;
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@ -115,7 +115,7 @@ addInstSelector(PassManagerBase &PM, unsigned OptLevel)
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// machine code is emitted. return true if -print-machineinstrs should
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// print out the code after the passes.
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bool MipsTargetMachine::
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addPreEmitPass(PassManagerBase &PM, unsigned OptLevel)
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addPreEmitPass(PassManagerBase &PM, bool Fast)
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{
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PM.add(createMipsDelaySlotFillerPass(*this));
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return true;
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@ -124,10 +124,10 @@ addPreEmitPass(PassManagerBase &PM, unsigned OptLevel)
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// Implements the AssemblyEmitter for the target. Must return
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// true if AssemblyEmitter is supported
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bool MipsTargetMachine::
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addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
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addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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bool Verbose, raw_ostream &Out)
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{
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// Output assembly language.
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PM.add(createMipsCodePrinterPass(Out, *this, OptLevel, Verbose));
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PM.add(createMipsCodePrinterPass(Out, *this, Fast, Verbose));
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return false;
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}
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