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R600: Use DAG lowering pass to handle fcos/fsin
NOTE: This is a candidate for the stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185940 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -364,6 +364,14 @@ def DOT4 : SDNode<"AMDGPUISD::DOT4",
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[]
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>;
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def COS_HW : SDNode<"AMDGPUISD::COS_HW",
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SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>
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>;
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def SIN_HW : SDNode<"AMDGPUISD::SIN_HW",
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SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>
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>;
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def TEXTURE_FETCH_Type : SDTypeProfile<1, 19, [SDTCisFP<0>]>;
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def TEXTURE_FETCH: SDNode<"AMDGPUISD::TEXTURE_FETCH", TEXTURE_FETCH_Type, []>;
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@@ -1080,14 +1088,14 @@ class RECIPSQRT_IEEE_Common <bits<11> inst> : R600_1OP <
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}
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class SIN_Common <bits<11> inst> : R600_1OP <
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inst, "SIN", []>{
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inst, "SIN", [(set f32:$dst, (SIN_HW f32:$src0))]>{
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let Trig = 1;
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let TransOnly = 1;
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let Itinerary = TransALU;
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}
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class COS_Common <bits<11> inst> : R600_1OP <
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inst, "COS", []> {
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inst, "COS", [(set f32:$dst, (COS_HW f32:$src0))]> {
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let Trig = 1;
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let TransOnly = 1;
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let Itinerary = TransALU;
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@@ -1228,18 +1236,6 @@ let Predicates = [isR600] in {
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}
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// Helper pattern for normalizing inputs to triginomic instructions for R700+
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// cards.
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class COS_PAT <InstR600 trig> : Pat<
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(fcos f32:$src),
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(trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), $src))
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>;
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class SIN_PAT <InstR600 trig> : Pat<
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(fsin f32:$src),
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(trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), $src))
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>;
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//===----------------------------------------------------------------------===//
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// R700 Only instructions
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//===----------------------------------------------------------------------===//
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@@ -1247,10 +1243,6 @@ class SIN_PAT <InstR600 trig> : Pat<
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let Predicates = [isR700] in {
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def SIN_r700 : SIN_Common<0x6E>;
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def COS_r700 : COS_Common<0x6F>;
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// R700 normalizes inputs to SIN/COS the same as EG
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def : SIN_PAT <SIN_r700>;
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def : COS_PAT <COS_r700>;
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}
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//===----------------------------------------------------------------------===//
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@@ -1276,8 +1268,6 @@ def SIN_eg : SIN_Common<0x8D>;
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def COS_eg : COS_Common<0x8E>;
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def : POW_Common <LOG_IEEE_eg, EXP_IEEE_eg, MUL>;
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def : SIN_PAT <SIN_eg>;
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def : COS_PAT <COS_eg>;
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def : Pat<(fsqrt f32:$src), (MUL $src, (RECIPSQRT_CLAMPED_eg $src))>;
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//===----------------------------------------------------------------------===//
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@@ -1726,8 +1716,6 @@ def COS_cm : COS_Common<0x8E>;
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} // End isVector = 1
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def : POW_Common <LOG_IEEE_cm, EXP_IEEE_cm, MUL>;
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def : SIN_PAT <SIN_cm>;
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def : COS_PAT <COS_cm>;
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defm DIV_cm : DIV_Common<RECIP_IEEE_cm>;
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