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ARM byval support. Will be enabled by another patch to the FE. <rdar://problem/7662569>

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129858 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stuart Hastings
2011-04-20 16:47:52 +00:00
parent 88c924c67e
commit c73158730d
6 changed files with 193 additions and 84 deletions
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7
lib/CodeGen/CallingConvLower.cpp
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@ -25,10 +25,12 @@ using namespace llvm;
CCState::CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &tm,
SmallVector<CCValAssign, 16> &locs, LLVMContext &C)
: CallingConv(CC), IsVarArg(isVarArg), TM(tm),
TRI(*TM.getRegisterInfo()), Locs(locs), Context(C) {
TRI(*TM.getRegisterInfo()), Locs(locs), Context(C),
CallOrPrologue(Invalid) {
// No stack is used.
StackOffset = 0;
clearFirstByValReg();
UsedRegs.resize((TRI.getNumRegs()+31)/32);
}
@ -45,10 +47,9 @@ void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
Size = MinSize;
if (MinAlign > (int)Align)
Align = MinAlign;
TM.getTargetLowering()->HandleByVal(const_cast<CCState*>(this), Size);
unsigned Offset = AllocateStack(Size, Align);
addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
TM.getTargetLowering()->HandleByVal(const_cast<CCState*>(this));
}
/// MarkAllocated - Mark a register and all of its aliases as allocated.