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be layout aware, to produce:

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testb	$1, %al
	je	LBB0_2
## BB#1:                                ## %if.then
	movb	$0, %al

instead of:

	testb	$1, %al
	jne	LBB0_1
	jmp	LBB0_2
LBB0_1:                                 ## %if.then
	movb	$0, %al

how 'bout that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129749 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2011-04-19 04:26:32 +00:00
parent 90cb88a9b4
commit c76d121807
2 changed files with 10 additions and 1 deletions
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9
lib/Target/X86/X86FastISel.cpp
View File

@ -1084,7 +1084,14 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
if (OpReg == 0) return false;
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TestOpc))
.addReg(OpReg).addImm(1);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::JNE_4))
unsigned JmpOpc = X86::JNE_4;
if (FuncInfo.MBB->isLayoutSuccessor(TrueMBB)) {
std::swap(TrueMBB, FalseMBB);
JmpOpc = X86::JE_4;
}
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(JmpOpc))
.addMBB(TrueMBB);
FastEmitBranch(FalseMBB, DL);
FuncInfo.MBB->addSuccessor(TrueMBB);

2
test/CodeGen/X86/fast-isel-x86-64.ll
View File

@ -142,5 +142,7 @@ if.end: ; preds = %if.then, %entry
ret void
; CHECK: test12:
; CHECK: testb $1,
; CHECK-NEXT: je L
; CHECK-NEXT: movb $0, %al
}