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synced 2025-02-06 06:33:24 +00:00
Move part of SSE 1 & 2 compare, shuffle and unpack instructions closely. Preparing them for refactoring and to the addition of their AVX forms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106437 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1135,6 +1135,16 @@ let Constraints = "$src1 = $dst" in {
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"cmp${cc}ps\t{$src, $dst|$dst, $src}",
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"cmp${cc}ps\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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(memop addr:$src), imm:$cc))]>;
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(memop addr:$src), imm:$cc))]>;
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def CMPPDrri : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def CMPPDrmi : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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(memop addr:$src), imm:$cc))]>;
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// Accept explicit immediate argument form instead of comparison code.
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// Accept explicit immediate argument form instead of comparison code.
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let isAsmParserOnly = 1 in {
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let isAsmParserOnly = 1 in {
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@ -1144,12 +1154,22 @@ let isAsmParserOnly = 1 in {
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def CMPPSrmi_alt : PSIi8<0xC2, MRMSrcMem,
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def CMPPSrmi_alt : PSIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
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"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
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def CMPPDrri_alt : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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def CMPPDrmi_alt : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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}
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}
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}
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}
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
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(CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
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(CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), (memop addr:$src2), imm:$cc)),
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), (memop addr:$src2), imm:$cc)),
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(CMPPSrmi (v4f32 VR128:$src1), addr:$src2, imm:$cc)>;
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(CMPPSrmi (v4f32 VR128:$src1), addr:$src2, imm:$cc)>;
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def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
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(CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;
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def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), (memop addr:$src2), imm:$cc)),
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(CMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>;
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// Shuffle and unpack instructions
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// Shuffle and unpack instructions
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let Constraints = "$src1 = $dst" in {
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let Constraints = "$src1 = $dst" in {
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@ -1167,6 +1187,18 @@ let Constraints = "$src1 = $dst" in {
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[(set VR128:$dst,
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[(set VR128:$dst,
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(v4f32 (shufp:$src3
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(v4f32 (shufp:$src3
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VR128:$src1, (memopv4f32 addr:$src2))))]>;
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VR128:$src1, (memopv4f32 addr:$src2))))]>;
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def SHUFPDrri : PDIi8<0xC6, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3),
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"shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst,
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(v2f64 (shufp:$src3 VR128:$src1, VR128:$src2)))]>;
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def SHUFPDrmi : PDIi8<0xC6, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1,
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f128mem:$src2, i8imm:$src3),
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"shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst,
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(v2f64 (shufp:$src3
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VR128:$src1, (memopv2f64 addr:$src2))))]>;
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let AddedComplexity = 10 in {
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let AddedComplexity = 10 in {
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def UNPCKHPSrr : PSI<0x15, MRMSrcReg,
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def UNPCKHPSrr : PSI<0x15, MRMSrcReg,
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@ -1191,6 +1223,28 @@ let Constraints = "$src1 = $dst" in {
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"unpcklps\t{$src2, $dst|$dst, $src2}",
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"unpcklps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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[(set VR128:$dst,
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(unpckl VR128:$src1, (memopv4f32 addr:$src2)))]>;
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(unpckl VR128:$src1, (memopv4f32 addr:$src2)))]>;
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def UNPCKHPDrr : PDI<0x15, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1, VR128:$src2)))]>;
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def UNPCKHPDrm : PDI<0x15, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1,
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(memopv2f64 addr:$src2))))]>;
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def UNPCKLPDrr : PDI<0x14, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckl VR128:$src1, VR128:$src2)))]>;
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def UNPCKLPDrm : PDI<0x14, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(unpckl VR128:$src1, (memopv2f64 addr:$src2)))]>;
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} // AddedComplexity
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} // AddedComplexity
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} // Constraints = "$src1 = $dst"
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} // Constraints = "$src1 = $dst"
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@ -1786,75 +1840,6 @@ defm SQRT : sse2_fp_unop_rm<0x51, "sqrt", fsqrt,
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// There is no f64 version of the reciprocal approximation instructions.
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// There is no f64 version of the reciprocal approximation instructions.
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let Constraints = "$src1 = $dst" in {
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def CMPPDrri : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def CMPPDrmi : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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(memop addr:$src), imm:$cc))]>;
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// Accept explicit immediate argument form instead of comparison code.
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let isAsmParserOnly = 1 in {
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def CMPPDrri_alt : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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def CMPPDrmi_alt : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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}
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}
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def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
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(CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;
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def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), (memop addr:$src2), imm:$cc)),
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(CMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>;
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// Shuffle and unpack instructions
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let Constraints = "$src1 = $dst" in {
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def SHUFPDrri : PDIi8<0xC6, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i8imm:$src3),
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"shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst,
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(v2f64 (shufp:$src3 VR128:$src1, VR128:$src2)))]>;
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def SHUFPDrmi : PDIi8<0xC6, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1,
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f128mem:$src2, i8imm:$src3),
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"shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
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[(set VR128:$dst,
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(v2f64 (shufp:$src3
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VR128:$src1, (memopv2f64 addr:$src2))))]>;
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let AddedComplexity = 10 in {
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def UNPCKHPDrr : PDI<0x15, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1, VR128:$src2)))]>;
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def UNPCKHPDrm : PDI<0x15, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1,
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(memopv2f64 addr:$src2))))]>;
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def UNPCKLPDrr : PDI<0x14, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckl VR128:$src1, VR128:$src2)))]>;
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def UNPCKLPDrm : PDI<0x14, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(unpckl VR128:$src1, (memopv2f64 addr:$src2)))]>;
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} // AddedComplexity
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} // Constraints = "$src1 = $dst"
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//===---------------------------------------------------------------------===//
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//===---------------------------------------------------------------------===//
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// SSE integer instructions
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// SSE integer instructions
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let ExeDomain = SSEPackedInt in {
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let ExeDomain = SSEPackedInt in {
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