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TRUNCATE constant folding - minor fix for rL233224
Fix for test case found by James Molloy - TRUNCATE of constant build vectors can be more simply achieved by simply replacing with a new build vector node with the truncated value type - no need to touch the scalar operands at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235079 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2851,13 +2851,16 @@ SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
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// FIXME: Entirely reasonable to perform folding of other unary
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// FIXME: Entirely reasonable to perform folding of other unary
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// operations here as the need arises.
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// operations here as the need arises.
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break;
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break;
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case ISD::TRUNCATE:
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// Constant build vector truncation can be done with the original scalar
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// operands but with a new build vector with the truncated value type.
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return getNode(ISD::BUILD_VECTOR, DL, VT, BV->ops());
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case ISD::FNEG:
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case ISD::FNEG:
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case ISD::FABS:
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case ISD::FABS:
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case ISD::FCEIL:
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case ISD::FCEIL:
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case ISD::FTRUNC:
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case ISD::FTRUNC:
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case ISD::FFLOOR:
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case ISD::FFLOOR:
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case ISD::FP_EXTEND:
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case ISD::FP_EXTEND:
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case ISD::TRUNCATE:
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case ISD::UINT_TO_FP:
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case ISD::UINT_TO_FP:
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case ISD::SINT_TO_FP: {
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case ISD::SINT_TO_FP: {
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// Let the above scalar folding handle the folding of each element.
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// Let the above scalar folding handle the folding of each element.
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21
test/CodeGen/AArch64/fold-constants.ll
Normal file
21
test/CodeGen/AArch64/fold-constants.ll
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@ -0,0 +1,21 @@
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; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
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define i64 @dotests_616() {
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; CHECK-LABEL: dotests_616
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; CHECK: movi d0, #0000000000000000
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; CHECK-NEXT: umov w8, v0.b[2]
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; CHECK-NEXT: sbfx w8, w8, #0, #1
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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entry:
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%0 = bitcast <2 x i64> zeroinitializer to <8 x i16>
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%1 = and <8 x i16> zeroinitializer, %0
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%2 = icmp ne <8 x i16> %1, zeroinitializer
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%3 = extractelement <8 x i1> %2, i32 2
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%vgetq_lane285 = sext i1 %3 to i16
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%vset_lane = insertelement <4 x i16> undef, i16 %vgetq_lane285, i32 0
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%4 = bitcast <4 x i16> %vset_lane to <1 x i64>
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%vget_lane = extractelement <1 x i64> %4, i32 0
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ret i64 %vget_lane
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}
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