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Update XCoreRegisterInfo::eliminateFrameIndex() to handle DBG_VALUE
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135146 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -196,7 +196,16 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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#endif
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Offset += StackSize;
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unsigned FrameReg = getFrameRegister(MF);
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// Special handling of DBG_VALUE instructions.
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if (MI.isDebugValue()) {
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MI.getOperand(i).ChangeToRegister(FrameReg, false /*isDef*/);
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MI.getOperand(i+1).ChangeToImmediate(Offset);
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return;
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}
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// fold constant into offset.
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Offset += MI.getOperand(i + 1).getImm();
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MI.getOperand(i + 1).ChangeToImmediate(0);
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@ -208,7 +217,7 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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Offset/=4;
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bool FP = TFI->hasFP(MF);
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unsigned Reg = MI.getOperand(0).getReg();
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bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill();
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@ -219,7 +228,6 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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if (FP) {
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bool isUs = isImmUs(Offset);
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unsigned FramePtr = XCore::R10;
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if (!isUs) {
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if (!RS)
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@ -231,18 +239,18 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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switch (MI.getOpcode()) {
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case XCore::LDWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addReg(ScratchReg, RegState::Kill);
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break;
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case XCore::STWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
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.addReg(Reg, getKillRegState(isKill))
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addReg(ScratchReg, RegState::Kill);
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break;
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case XCore::LDAWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addReg(ScratchReg, RegState::Kill);
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break;
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default:
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@ -252,18 +260,18 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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switch (MI.getOpcode()) {
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case XCore::LDWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addImm(Offset);
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break;
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case XCore::STWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
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.addReg(Reg, getKillRegState(isKill))
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addImm(Offset);
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break;
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case XCore::LDAWFI:
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BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
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.addReg(FramePtr)
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.addReg(FrameReg)
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.addImm(Offset);
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break;
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default:
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