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Update XCoreRegisterInfo::eliminateFrameIndex() to handle DBG_VALUE

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instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135146 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne 2011-07-14 14:03:48 +00:00
parent d155945f15
commit c7e33965f0
1 changed files with 17 additions and 9 deletions
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26
lib/Target/XCore/XCoreRegisterInfo.cpp
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@ -196,7 +196,16 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
#endif #endif
Offset += StackSize; Offset += StackSize;
unsigned FrameReg = getFrameRegister(MF);
// Special handling of DBG_VALUE instructions.
if (MI.isDebugValue()) {
MI.getOperand(i).ChangeToRegister(FrameReg, false /*isDef*/);
MI.getOperand(i+1).ChangeToImmediate(Offset);
return;
}
// fold constant into offset. // fold constant into offset.
Offset += MI.getOperand(i + 1).getImm(); Offset += MI.getOperand(i + 1).getImm();
MI.getOperand(i + 1).ChangeToImmediate(0); MI.getOperand(i + 1).ChangeToImmediate(0);
@ -208,7 +217,7 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
Offset/=4; Offset/=4;
bool FP = TFI->hasFP(MF); bool FP = TFI->hasFP(MF);
unsigned Reg = MI.getOperand(0).getReg(); unsigned Reg = MI.getOperand(0).getReg();
bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill(); bool isKill = MI.getOpcode() == XCore::STWFI && MI.getOperand(0).isKill();
@ -219,7 +228,6 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
if (FP) { if (FP) {
bool isUs = isImmUs(Offset); bool isUs = isImmUs(Offset);
unsigned FramePtr = XCore::R10;
if (!isUs) { if (!isUs) {
if (!RS) if (!RS)
@ -231,18 +239,18 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
case XCore::LDWFI: case XCore::LDWFI:
BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
.addReg(FramePtr) .addReg(FrameReg)
.addReg(ScratchReg, RegState::Kill); .addReg(ScratchReg, RegState::Kill);
break; break;
case XCore::STWFI: case XCore::STWFI:
BuildMI(MBB, II, dl, TII.get(XCore::STW_3r)) BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
.addReg(Reg, getKillRegState(isKill)) .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr) .addReg(FrameReg)
.addReg(ScratchReg, RegState::Kill); .addReg(ScratchReg, RegState::Kill);
break; break;
case XCore::LDAWFI: case XCore::LDAWFI:
BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg) BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
.addReg(FramePtr) .addReg(FrameReg)
.addReg(ScratchReg, RegState::Kill); .addReg(ScratchReg, RegState::Kill);
break; break;
default: default:
@ -252,18 +260,18 @@ XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
case XCore::LDWFI: case XCore::LDWFI:
BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg) BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
.addReg(FramePtr) .addReg(FrameReg)
.addImm(Offset); .addImm(Offset);
break; break;
case XCore::STWFI: case XCore::STWFI:
BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
.addReg(Reg, getKillRegState(isKill)) .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr) .addReg(FrameReg)
.addImm(Offset); .addImm(Offset);
break; break;
case XCore::LDAWFI: case XCore::LDAWFI:
BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg) BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
.addReg(FramePtr) .addReg(FrameReg)
.addImm(Offset); .addImm(Offset);
break; break;
default: default: