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https://github.com/c64scene-ar/llvm-6502.git
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[C++] Use 'nullptr'. Target edition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207197 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -700,7 +700,7 @@ static SDNode *findUser(SDValue Value, unsigned Opcode) {
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if (I->getOpcode() == Opcode)
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return *I;
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}
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return 0;
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return nullptr;
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}
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/// This transforms the control flow intrinsics to get the branch destination as
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@@ -712,7 +712,7 @@ SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND,
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SDNode *Intr = BRCOND.getOperand(1).getNode();
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SDValue Target = BRCOND.getOperand(2);
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SDNode *BR = 0;
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SDNode *BR = nullptr;
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if (Intr->getOpcode() == ISD::SETCC) {
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// As long as we negate the condition everything is fine
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@@ -1022,7 +1022,7 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N,
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SDValue Arg0 = N->getOperand(0);
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SDValue Arg1 = N->getOperand(1);
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SDValue CC = N->getOperand(2);
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ConstantSDNode * C = NULL;
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ConstantSDNode * C = nullptr;
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ISD::CondCode CCOp = dyn_cast<CondCodeSDNode>(CC)->get();
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// i1 setcc (sext(i1), 0, setne) -> i1 setcc(i1, 0, setne)
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@@ -1093,7 +1093,7 @@ bool SITargetLowering::foldImm(SDValue &Operand, int32_t &Immediate,
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MachineSDNode *Mov = dyn_cast<MachineSDNode>(Operand);
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const SIInstrInfo *TII =
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static_cast<const SIInstrInfo*>(getTargetMachine().getInstrInfo());
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if (Mov == 0 || !TII->isMov(Mov->getMachineOpcode()))
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if (!Mov || !TII->isMov(Mov->getMachineOpcode()))
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return false;
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const SDValue &Op = Mov->getOperand(0);
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@@ -1140,7 +1140,7 @@ const TargetRegisterClass *SITargetLowering::getRegClassForNode(
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}
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return TRI.getPhysRegClass(Reg);
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}
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default: return NULL;
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default: return nullptr;
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}
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}
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const MCInstrDesc &Desc = TII->get(Op->getMachineOpcode());
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@@ -1244,14 +1244,14 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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// Commuted opcode if available
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int OpcodeRev = Desc->isCommutable() ? TII->commuteOpcode(Opcode) : -1;
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const MCInstrDesc *DescRev = OpcodeRev == -1 ? 0 : &TII->get(OpcodeRev);
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const MCInstrDesc *DescRev = OpcodeRev == -1 ? nullptr : &TII->get(OpcodeRev);
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assert(!DescRev || DescRev->getNumDefs() == NumDefs);
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assert(!DescRev || DescRev->getNumOperands() == NumOps);
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// e64 version if available, -1 otherwise
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int OpcodeE64 = AMDGPU::getVOPe64(Opcode);
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const MCInstrDesc *DescE64 = OpcodeE64 == -1 ? 0 : &TII->get(OpcodeE64);
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const MCInstrDesc *DescE64 = OpcodeE64 == -1 ? nullptr : &TII->get(OpcodeE64);
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assert(!DescE64 || DescE64->getNumDefs() == NumDefs);
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assert(!DescE64 || DescE64->getNumOperands() == (NumOps + 4));
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@@ -1324,7 +1324,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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std::swap(Ops[0], Ops[1]);
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Desc = DescRev;
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DescRev = 0;
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DescRev = nullptr;
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continue;
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}
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}
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@@ -1345,7 +1345,7 @@ SDNode *SITargetLowering::foldOperands(MachineSDNode *Node,
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Immediate = -1;
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Promote2e64 = true;
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Desc = DescE64;
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DescE64 = 0;
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DescE64 = nullptr;
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}
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}
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}
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