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Revise my previous change 68996 as suggested by Duncan.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2009-04-20 17:27:09 +00:00
parent c4f718a3a7
commit c885165e66
4 changed files with 11 additions and 16 deletions
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13
include/llvm/CodeGen/SelectionDAGNodes.h
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@@ -288,13 +288,12 @@ namespace ISD {
// value as an integer 0/1 value. // value as an integer 0/1 value.
FGETSIGN, FGETSIGN,
/// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
/// with the specified, possibly variable, elements. The number of elements /// specified, possibly variable, elements. The number of elements is
/// is required to be a power of two. The types of the operands must /// required to be a power of two. The types of the operands must all be
/// all be the same. They must match the vector element type, except if an /// the same and must match the vector element type, except that integer
/// integer element type is not legal for the target, the operands may /// types are allowed to be larger than the element type, in which case
/// be promoted to a legal type, in which case the operands are implicitly /// the operands are implicitly truncated.
/// truncated to the vector element types.
BUILD_VECTOR, BUILD_VECTOR,
/// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element

6
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -3811,12 +3811,8 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT DstEltVT) {
SDValue Op = BV->getOperand(i); SDValue Op = BV->getOperand(i);
// If the vector element type is not legal, the BUILD_VECTOR operands // If the vector element type is not legal, the BUILD_VECTOR operands
// are promoted and implicitly truncated. Make that explicit here. // are promoted and implicitly truncated. Make that explicit here.
if (Op.getValueType() != SrcEltVT) { if (Op.getValueType() != SrcEltVT)
if (Op.getOpcode() == ISD::UNDEF)
Op = DAG.getUNDEF(SrcEltVT);
else
Op = DAG.getNode(ISD::TRUNCATE, BV->getDebugLoc(), SrcEltVT, Op); Op = DAG.getNode(ISD::TRUNCATE, BV->getDebugLoc(), SrcEltVT, Op);
}
Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, BV->getDebugLoc(), Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, BV->getDebugLoc(),
DstEltVT, Op)); DstEltVT, Op));
AddToWorkList(Ops.back().getNode()); AddToWorkList(Ops.back().getNode());

3
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@@ -808,9 +808,8 @@ SDValue DAGTypeLegalizer::PromoteIntOp_BUILD_VECTOR(SDNode *N) {
"Type of inserted value narrower than vector element type!"); "Type of inserted value narrower than vector element type!");
SmallVector<SDValue, 16> NewOps; SmallVector<SDValue, 16> NewOps;
for (unsigned i = 0; i < NumElts; ++i) { for (unsigned i = 0; i < NumElts; ++i)
NewOps.push_back(GetPromotedInteger(N->getOperand(i))); NewOps.push_back(GetPromotedInteger(N->getOperand(i)));
}
return DAG.UpdateNodeOperands(SDValue(N, 0), &NewOps[0], NumElts); return DAG.UpdateNodeOperands(SDValue(N, 0), &NewOps[0], NumElts);
} }

3
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@@ -2556,7 +2556,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
if (Elt.getValueType() != VT) { if (Elt.getValueType() != VT) {
// If the vector element type is not legal, the BUILD_VECTOR operands // If the vector element type is not legal, the BUILD_VECTOR operands
// are promoted and implicitly truncated. Make that explicit here. // are promoted and implicitly truncated. Make that explicit here.
assert(Elt.getValueType() == TLI.getTypeToTransformTo(VT) && assert(VT.isInteger() && Elt.getValueType().isInteger() &&
VT.bitsLE(Elt.getValueType()) &&
"Bad type for BUILD_VECTOR operand"); "Bad type for BUILD_VECTOR operand");
Elt = getNode(ISD::TRUNCATE, DL, VT, Elt); Elt = getNode(ISD::TRUNCATE, DL, VT, Elt);
} }