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Rework the PPC TargetMachine so that the non-function specific

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overrides happen at TargetMachine creation and not on every
subtarget creation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218805 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-10-01 20:38:26 +00:00
parent 2e07dedce3
commit c9038d9c1b
2 changed files with 32 additions and 27 deletions
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28
lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -132,35 +132,13 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// Initialize scheduling itinerary for the specified CPU. // Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName); InstrItins = getInstrItineraryForCPU(CPUName);
// Make sure 64-bit features are available when CPUname is generic
std::string FullFS = FS;
// If we are generating code for ppc64, verify that options make sense.
if (IsPPC64) {
Has64BitSupport = true;
// Silently force 64-bit register use on ppc64.
Use64BitRegs = true;
if (!FullFS.empty())
FullFS = "+64bit," + FullFS;
else
FullFS = "+64bit";
}
// At -O2 and above, track CR bits as individual registers.
if (OptLevel >= CodeGenOpt::Default) {
if (!FullFS.empty())
FullFS = "+crbits," + FullFS;
else
FullFS = "+crbits";
}
// Parse features string. // Parse features string.
ParseSubtargetFeatures(CPUName, FullFS); ParseSubtargetFeatures(CPUName, FS);
// If the user requested use of 64-bit regs, but the cpu selected doesn't // If the user requested use of 64-bit regs, but the cpu selected doesn't
// support it, ignore. // support it, ignore.
if (use64BitRegs() && !has64BitSupport()) if (IsPPC64 && has64BitSupport())
Use64BitRegs = false; Use64BitRegs = true;
// Set up darwin-specific properties. // Set up darwin-specific properties.
if (isDarwin()) if (isDarwin())

31
lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -37,12 +37,39 @@ extern "C" void LLVMInitializePowerPCTarget() {
RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget); RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
} }
static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
std::string FullFS = FS;
Triple TargetTriple(TT);
// Make sure 64-bit features are available when CPUname is generic
if (TargetTriple.getArch() == Triple::ppc64 ||
TargetTriple.getArch() == Triple::ppc64le) {
if (!FullFS.empty())
FullFS = "+64bit," + FullFS;
else
FullFS = "+64bit";
}
if (OL >= CodeGenOpt::Default) {
if (!FullFS.empty())
FullFS = "+crbits," + FullFS;
else
FullFS = "+crbits";
}
return FullFS;
}
// The FeatureString here is a little subtle. We are modifying the feature string
// with what are (currently) non-function specific overrides as it goes into the
// LLVMTargetMachine constructor and then using the stored value in the
// Subtarget constructor below it.
PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU, PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
StringRef FS, const TargetOptions &Options, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM, Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL) CodeGenOpt::Level OL)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
Subtarget(TT, CPU, FS, *this, OL) { CM, OL),
Subtarget(TT, CPU, TargetFS, *this, OL) {
initAsmInfo(); initAsmInfo();
} }