misched: Doxument the TargetSchedule API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165565 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-10-09 23:44:29 +00:00
parent 42bb106118
commit c92d72abd0

View File

@@ -37,23 +37,35 @@ class TargetSchedModel {
public: public:
TargetSchedModel(): STI(0), TII(0) {} TargetSchedModel(): STI(0), TII(0) {}
/// \brief Initialize the machine model for instruction scheduling.
///
/// The machine model API keeps a copy of the top-level MCSchedModel table
/// indices and may query TargetSubtargetInfo and TargetInstrInfo to resolve
/// dynamic properties.
void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti,
const TargetInstrInfo *tii); const TargetInstrInfo *tii);
/// \brief TargetInstrInfo getter.
const TargetInstrInfo *getInstrInfo() const { return TII; } const TargetInstrInfo *getInstrInfo() const { return TII; }
/// Return true if this machine model includes an instruction-level scheduling /// \brief Return true if this machine model includes an instruction-level
/// model. This is more detailed than the course grain IssueWidth and default /// scheduling model.
///
/// This is more detailed than the course grain IssueWidth and default
/// latency properties, but separate from the per-cycle itinerary data. /// latency properties, but separate from the per-cycle itinerary data.
bool hasInstrSchedModel() const; bool hasInstrSchedModel() const;
/// Return true if this machine model includes cycle-to-cycle itinerary /// \brief Return true if this machine model includes cycle-to-cycle itinerary
/// data. This models scheduling at each stage in the processor pipeline. /// data.
///
/// This models scheduling at each stage in the processor pipeline.
bool hasInstrItineraries() const; bool hasInstrItineraries() const;
/// computeOperandLatency - Compute and return the latency of the given data /// \brief Compute operand latency based on the available machine model.
/// dependent def and use when the operand indices are already known. UseMI ///
/// may be NULL for an unknown user. /// Computes and return the latency of the given data dependent def and use
/// when the operand indices are already known. UseMI may be NULL for an
/// unknown user.
/// ///
/// FindMin may be set to get the minimum vs. expected latency. Minimum /// FindMin may be set to get the minimum vs. expected latency. Minimum
/// latency is used for scheduling groups, while expected latency is for /// latency is used for scheduling groups, while expected latency is for
@@ -62,7 +74,10 @@ public:
const MachineInstr *UseMI, unsigned UseOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx,
bool FindMin) const; bool FindMin) const;
/// \brief Identify the processor corresponding to the current subtarget.
unsigned getProcessorID() const { return SchedModel.getProcessorID(); } unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
/// \brief Maximum number of micro-ops that may be scheduled per cycle.
unsigned getIssueWidth() const { return SchedModel.IssueWidth; } unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
private: private: