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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -7294,7 +7294,7 @@ processInstruction(MCInst &Inst,
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case ARM::t2RORrr:
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case ARM::t2RORrr:
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case ARM::t2BICrr:
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case ARM::t2BICrr:
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{
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{
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// Assemblers should use the narrow encodings of these instructions when permissable.
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// Assemblers should use the narrow encodings of these instructions when permissible.
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if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
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if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
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isARMLowRegister(Inst.getOperand(2).getReg())) &&
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isARMLowRegister(Inst.getOperand(2).getReg())) &&
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Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&
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Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&
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@ -7330,7 +7330,7 @@ processInstruction(MCInst &Inst,
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case ARM::t2ADCrr:
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case ARM::t2ADCrr:
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case ARM::t2ORRrr:
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case ARM::t2ORRrr:
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{
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{
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// Assemblers should use the narrow encodings of these instructions when permissable.
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// Assemblers should use the narrow encodings of these instructions when permissible.
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// These instructions are special in that they are commutable, so shorter encodings
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// These instructions are special in that they are commutable, so shorter encodings
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// are available more often.
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// are available more often.
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if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
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if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
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