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Merging r229751:

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r229751 | marek.olsak | 2015-02-18 17:12:41 -0500 (Wed, 18 Feb 2015) | 2 lines

R600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@236019 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard committed 2015-04-28 19:12:14 +00:00
1 parent 00a80f8263
commit c997e431ba
1 file changed
+3 -2
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lib/Target/R600/SIInstrInfo.cpp
+3 -2
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@@ -1140,6 +1140,8 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
return false;
}
int RegClass = Desc.OpInfo[i].RegClass;
switch (Desc.OpInfo[i].OperandType) {
case MCOI::OPERAND_REGISTER:
if (MI->getOperand(i).isImm() || MI->getOperand(i).isFPImm()) {
@@ -1150,7 +1152,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
case AMDGPU::OPERAND_REG_IMM32:
break;
case AMDGPU::OPERAND_REG_INLINE_C:
if (MI->getOperand(i).isImm() && !isInlineConstant(MI->getOperand(i))) {
if (isLiteralConstant(MI->getOperand(i))) {
ErrInfo = "Illegal immediate value for operand.";
return false;
}
@@ -1171,7 +1173,6 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
if (!MI->getOperand(i).isReg())
continue;
int RegClass = Desc.OpInfo[i].RegClass;
if (RegClass != -1) {
unsigned Reg = MI->getOperand(i).getReg();
if (TargetRegisterInfo::isVirtualRegister(Reg))