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Replace PPC instruction-size code with MCInstrDesc getSize

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As part of the cleanup done to enable the disassembler, the PPC instructions
now have a valid Size description field. This can now be used to replace some
custom logic in a few places to compute instruction sizes.

Patch by David Wiberg!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200623 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel 2014-02-02 06:12:27 +00:00
parent a16c1b55e2
commit c9ac32837d
2 changed files with 11 additions and 20 deletions
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12
lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
View File

@ -33,10 +33,12 @@ class PPCMCCodeEmitter : public MCCodeEmitter {
PPCMCCodeEmitter(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION; PPCMCCodeEmitter(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION;
void operator=(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION; void operator=(const PPCMCCodeEmitter &) LLVM_DELETED_FUNCTION;
const MCInstrInfo &MCII;
const MCContext &CTX; const MCContext &CTX;
public: public:
PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx) : CTX(ctx) { PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)
: MCII(mcii), CTX(ctx) {
} }
~PPCMCCodeEmitter() {} ~PPCMCCodeEmitter() {}
@ -90,18 +92,14 @@ public:
// It's just a nop to keep the register classes happy, so don't // It's just a nop to keep the register classes happy, so don't
// generate anything. // generate anything.
unsigned Opcode = MI.getOpcode(); unsigned Opcode = MI.getOpcode();
const MCInstrDesc &Desc = MCII.get(Opcode);
if (Opcode == TargetOpcode::COPY_TO_REGCLASS) if (Opcode == TargetOpcode::COPY_TO_REGCLASS)
return; return;
uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
// BL8_NOP etc. all have a size of 8 because of the following 'nop'.
unsigned Size = 4; // FIXME: Have Desc.getSize() return the correct value!
if (Opcode == PPC::BL8_NOP || Opcode == PPC::BLA8_NOP ||
Opcode == PPC::BL8_NOP_TLS)
Size = 8;
// Output the constant in big endian byte order. // Output the constant in big endian byte order.
unsigned Size = Desc.getSize();
int ShiftValue = (Size * 8) - 8; int ShiftValue = (Size * 8) - 8;
for (unsigned i = 0; i != Size; ++i) { for (unsigned i = 0; i != Size; ++i) {
OS << (char)(Bits >> ShiftValue); OS << (char)(Bits >> ShiftValue);

19
lib/Target/PowerPC/PPCInstrInfo.cpp
View File

@ -1436,22 +1436,15 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr *CmpInstr,
/// instruction may be. This returns the maximum number of bytes. /// instruction may be. This returns the maximum number of bytes.
/// ///
unsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { unsigned PPCInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
switch (MI->getOpcode()) { unsigned Opcode = MI->getOpcode();
case PPC::INLINEASM: { // Inline Asm: Variable size.
if (Opcode == PPC::INLINEASM) {
const MachineFunction *MF = MI->getParent()->getParent(); const MachineFunction *MF = MI->getParent()->getParent();
const char *AsmStr = MI->getOperand(0).getSymbolName(); const char *AsmStr = MI->getOperand(0).getSymbolName();
return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo()); return getInlineAsmLength(AsmStr, *MF->getTarget().getMCAsmInfo());
} } else {
case PPC::PROLOG_LABEL: const MCInstrDesc &Desc = get(Opcode);
case PPC::EH_LABEL: return Desc.getSize();
case PPC::GC_LABEL:
case PPC::DBG_VALUE:
return 0;
case PPC::BL8_NOP:
case PPC::BLA8_NOP:
return 8;
default:
return 4; // PowerPC instructions are all 4 bytes
} }
} }