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CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.

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SelectBasicBlock doesn't needs its BasicBlock argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-07-06 22:19:37 +00:00
parent 0d881dabc1
commit c9af33c685
8 changed files with 12 additions and 13 deletions
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1
include/llvm/CodeGen/SelectionDAGISel.h
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@ -285,7 +285,6 @@ private:
void FinishBasicBlock(MachineBasicBlock *BB); void FinishBasicBlock(MachineBasicBlock *BB);
MachineBasicBlock *SelectBasicBlock(MachineBasicBlock *BB, MachineBasicBlock *SelectBasicBlock(MachineBasicBlock *BB,
const BasicBlock *LLVMBB,
BasicBlock::const_iterator Begin, BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End, BasicBlock::const_iterator End,
bool &HadTailCall); bool &HadTailCall);

2
include/llvm/Target/TargetLowering.h
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@ -1158,7 +1158,7 @@ public:
virtual bool CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, virtual bool CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<EVT> &OutTys, const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
SelectionDAG &DAG) const LLVMContext &Context) const
{ {
// Return true by default to get preexisting behavior. // Return true by default to get preexisting behavior.
return true; return true;

5
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -4562,7 +4562,7 @@ void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
OutVTs, OutsFlags, TLI, &Offsets); OutVTs, OutsFlags, TLI, &Offsets);
bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(), bool CanLowerReturn = TLI.CanLowerReturn(CS.getCallingConv(),
FTy->isVarArg(), OutVTs, OutsFlags, DAG); FTy->isVarArg(), OutVTs, OutsFlags, FTy->getContext());
SDValue DemoteStackSlot; SDValue DemoteStackSlot;
@ -5959,7 +5959,8 @@ void SelectionDAGISel::LowerArguments(const BasicBlock *LLVMBB) {
FuncInfo->CanLowerReturn = TLI.CanLowerReturn(F.getCallingConv(), FuncInfo->CanLowerReturn = TLI.CanLowerReturn(F.getCallingConv(),
F.isVarArg(), F.isVarArg(),
OutVTs, OutsFlags, DAG); OutVTs, OutsFlags,
F.getContext());
if (!FuncInfo->CanLowerReturn) { if (!FuncInfo->CanLowerReturn) {
// Put in an sret pointer parameter before all the other parameters. // Put in an sret pointer parameter before all the other parameters.
SmallVector<EVT, 1> ValueVTs; SmallVector<EVT, 1> ValueVTs;

5
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -321,7 +321,6 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
MachineBasicBlock * MachineBasicBlock *
SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB, SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
const BasicBlock *LLVMBB,
BasicBlock::const_iterator Begin, BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End, BasicBlock::const_iterator End,
bool &HadTailCall) { bool &HadTailCall) {
@ -736,7 +735,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
} }
bool HadTailCall = false; bool HadTailCall = false;
BB = SelectBasicBlock(BB, LLVMBB, BI, llvm::next(BI), HadTailCall); BB = SelectBasicBlock(BB, BI, llvm::next(BI), HadTailCall);
// If the call was emitted as a tail call, we're done with the block. // If the call was emitted as a tail call, we're done with the block.
if (HadTailCall) { if (HadTailCall) {
@ -772,7 +771,7 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
// block. // block.
if (BI != End) { if (BI != End) {
bool HadTailCall; bool HadTailCall;
BB = SelectBasicBlock(BB, LLVMBB, BI, End, HadTailCall); BB = SelectBasicBlock(BB, BI, End, HadTailCall);
} }
FinishBasicBlock(BB); FinishBasicBlock(BB);

4
lib/Target/X86/X86ISelLowering.cpp
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@ -1220,10 +1220,10 @@ bool
X86TargetLowering::CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, X86TargetLowering::CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<EVT> &OutTys, const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
SelectionDAG &DAG) const { LLVMContext &Context) const {
SmallVector<CCValAssign, 16> RVLocs; SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallConv, isVarArg, getTargetMachine(), CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
RVLocs, *DAG.getContext()); RVLocs, Context);
return CCInfo.CheckReturn(OutTys, ArgsFlags, RetCC_X86); return CCInfo.CheckReturn(OutTys, ArgsFlags, RetCC_X86);
} }

2
lib/Target/X86/X86ISelLowering.h
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@ -748,7 +748,7 @@ namespace llvm {
CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<EVT> &OutTys, const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
SelectionDAG &DAG) const; LLVMContext &Context) const;
void ReplaceATOMIC_BINARY_64(SDNode *N, SmallVectorImpl<SDValue> &Results, void ReplaceATOMIC_BINARY_64(SDNode *N, SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG, unsigned NewOp) const; SelectionDAG &DAG, unsigned NewOp) const;

4
lib/Target/XCore/XCoreISelLowering.cpp
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@ -1135,10 +1135,10 @@ bool XCoreTargetLowering::
CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<EVT> &OutTys, const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
SelectionDAG &DAG) const { LLVMContext &Context) const {
SmallVector<CCValAssign, 16> RVLocs; SmallVector<CCValAssign, 16> RVLocs;
CCState CCInfo(CallConv, isVarArg, getTargetMachine(), CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
RVLocs, *DAG.getContext()); RVLocs, Context);
return CCInfo.CheckReturn(OutTys, ArgsFlags, RetCC_XCore); return CCInfo.CheckReturn(OutTys, ArgsFlags, RetCC_XCore);
} }

2
lib/Target/XCore/XCoreISelLowering.h
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@ -192,7 +192,7 @@ namespace llvm {
CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, CanLowerReturn(CallingConv::ID CallConv, bool isVarArg,
const SmallVectorImpl<EVT> &OutTys, const SmallVectorImpl<EVT> &OutTys,
const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
SelectionDAG &DAG) const; LLVMContext &Context) const;
}; };
} }