Don't try to form FGETSIGN after legalization; it is possible in some cases, but the existing code can't do it correctly. PR11570.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146630 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-12-15 02:07:20 +00:00
parent 01d426e0e1
commit ca072a3977
2 changed files with 18 additions and 1 deletions

View File

@ -1792,7 +1792,8 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
case ISD::BITCAST:
// If this is an FP->Int bitcast and if the sign bit is the only
// thing demanded, turn this into a FGETSIGN.
if (!Op.getValueType().isVector() &&
if (!TLO.LegalOperations() &&
!Op.getValueType().isVector() &&
!Op.getOperand(0).getValueType().isVector() &&
NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
Op.getOperand(0).getValueType().isFloatingPoint()) {

View File

@ -78,6 +78,22 @@ entry:
ret i32 %shr.i
}
; PR11570
define void @float_call_signbit(double %n) {
entry:
; FIXME: This should also use movmskps; we don't form the FGETSIGN node
; in this case, though.
; CHECK: float_call_signbit:
; CHECK: movd %xmm0, %rdi
; FIXME
%t0 = bitcast double %n to i64
%tobool.i.i.i.i = icmp slt i64 %t0, 0
tail call void @float_call_signbit_callee(i1 zeroext %tobool.i.i.i.i)
ret void
}
declare void @float_call_signbit_callee(i1 zeroext)
; rdar://10247336
; movmskp{s|d} only set low 4/2 bits, high bits are known zero