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IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -1496,7 +1496,7 @@ Atomic Memory Ordering Constraints
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Atomic instructions (:ref:`cmpxchg <i_cmpxchg>`,
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:ref:`atomicrmw <i_atomicrmw>`, :ref:`fence <i_fence>`,
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:ref:`atomic load <i_load>`, and :ref:`atomic store <i_store>`) take
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an ordering parameter that determines which other atomic instructions on
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ordering parameters that determine which other atomic instructions on
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the same address they *synchronize with*. These semantics are borrowed
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from Java and C++0x, but are somewhat more colloquial. If these
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descriptions aren't precise enough, check those specs (see spec
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@@ -4990,7 +4990,7 @@ Syntax:
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::
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cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <ordering> ; yields {ty}
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cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <success ordering> <failure ordering> ; yields {ty}
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Overview:
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"""""""""
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@@ -5013,8 +5013,11 @@ type, and the type of '<pointer>' must be a pointer to that type. If the
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to modify the number or order of execution of this ``cmpxchg`` with
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other :ref:`volatile operations <volatile>`.
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The :ref:`ordering <ordering>` argument specifies how this ``cmpxchg``
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synchronizes with other atomic operations.
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The success and failure :ref:`ordering <ordering>` arguments specify how this
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``cmpxchg`` synchronizes with other atomic operations. The both ordering
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parameters must be at least ``monotonic``, the ordering constraint on failure
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must be no stronger than that on success, and the failure ordering cannot be
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either ``release`` or ``acq_rel``.
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The optional "``singlethread``" argument declares that the ``cmpxchg``
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is only atomic with respect to code (usually signal handlers) running in
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@@ -5032,10 +5035,9 @@ operand is read and compared to '``<cmp>``'; if the read value is the
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equal, '``<new>``' is written. The original value at the location is
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returned.
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A successful ``cmpxchg`` is a read-modify-write instruction for the purpose
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of identifying release sequences. A failed ``cmpxchg`` is equivalent to an
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atomic load with an ordering parameter determined by dropping any
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``release`` part of the ``cmpxchg``'s ordering.
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A successful ``cmpxchg`` is a read-modify-write instruction for the purpose of
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identifying release sequences. A failed ``cmpxchg`` is equivalent to an atomic
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load with an ordering parameter determined the second ordering parameter.
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Example:
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""""""""
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@@ -5049,7 +5051,7 @@ Example:
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loop:
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%cmp = phi i32 [ %orig, %entry ], [%old, %loop]
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%squared = mul i32 %cmp, %cmp
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%old = cmpxchg i32* %ptr, i32 %cmp, i32 %squared ; yields {i32}
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%old = cmpxchg i32* %ptr, i32 %cmp, i32 %squared acq_rel monotonic ; yields {i32}
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%success = icmp eq i32 %cmp, %old
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br i1 %success, label %done, label %loop
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