6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-10 04:33:40 +00:00
Code Issues Projects Releases Wiki Activity

The single check for N64 inside MipsDisassemblerBase's subclasses is actually wrong. It should be testing for FeatureGP64bit.There are no functional changes.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224339 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vladimir Medic 2014-12-16 15:29:12 +00:00
parent 78f6aad800
commit ca932f503b
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
View File

@ -36,15 +36,15 @@ public:
MipsDisassemblerBase(const MCSubtargetInfo &STI, MCContext &Ctx,
bool IsBigEndian)
: MCDisassembler(STI, Ctx),
IsN64(STI.getFeatureBits() & Mips::FeatureN64),
IsGP64Bit(STI.getFeatureBits() & Mips::FeatureGP64Bit),
IsBigEndian(IsBigEndian) {}
virtual ~MipsDisassemblerBase() {}
bool isN64() const { return IsN64; }
bool isGP64Bit() const { return IsGP64Bit; }
private:
bool IsN64;
bool IsGP64Bit;
protected:
bool IsBigEndian;
};
@ -974,7 +974,7 @@ static DecodeStatus DecodePtrRegisterClass(MCInst &Inst,
unsigned RegNo,
uint64_t Address,
const void *Decoder) {
if (static_cast<const MipsDisassembler *>(Decoder)->isN64())
if (static_cast<const MipsDisassembler *>(Decoder)->isGP64Bit())
return DecodeGPR64RegisterClass(Inst, RegNo, Address, Decoder);
return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder);