mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-02-07 14:33:15 +00:00
Fix a bug with insertelement on SPU.
The previous algorithm in LowerVECTOR_SHUFFLE didn't check all requirements for "monotonic" shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111361 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
86a791284a
commit
ca9460f5a0
@ -1755,11 +1755,12 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
// If we have a single element being moved from V1 to V2, this can be handled
|
||||
// using the C*[DX] compute mask instructions, but the vector elements have
|
||||
// to be monotonically increasing with one exception element.
|
||||
// to be monotonically increasing with one exception element, and the source
|
||||
// slot of the element to move must be the same as the destination.
|
||||
EVT VecVT = V1.getValueType();
|
||||
EVT EltVT = VecVT.getVectorElementType();
|
||||
unsigned EltsFromV2 = 0;
|
||||
unsigned V2Elt = 0;
|
||||
unsigned V2EltOffset = 0;
|
||||
unsigned V2EltIdx0 = 0;
|
||||
unsigned CurrElt = 0;
|
||||
unsigned MaxElts = VecVT.getVectorNumElements();
|
||||
@ -1792,9 +1793,13 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
|
||||
|
||||
if (monotonic) {
|
||||
if (SrcElt >= V2EltIdx0) {
|
||||
if (1 >= (++EltsFromV2)) {
|
||||
V2Elt = (V2EltIdx0 - SrcElt) << 2;
|
||||
}
|
||||
// TODO: optimize for the monotonic case when several consecutive
|
||||
// elements are taken form V2. Do we ever get such a case?
|
||||
if (EltsFromV2 == 0 && CurrElt == (SrcElt - V2EltIdx0))
|
||||
V2EltOffset = (SrcElt - V2EltIdx0) * (EltVT.getSizeInBits()/8);
|
||||
else
|
||||
monotonic = false;
|
||||
++EltsFromV2;
|
||||
} else if (CurrElt != SrcElt) {
|
||||
monotonic = false;
|
||||
}
|
||||
@ -1830,7 +1835,7 @@ static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
|
||||
// R1 ($sp) is used here only as it is guaranteed to have last bits zero
|
||||
SDValue Pointer = DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT,
|
||||
DAG.getRegister(SPU::R1, PtrVT),
|
||||
DAG.getConstant(V2Elt, MVT::i32));
|
||||
DAG.getConstant(V2EltOffset, MVT::i32));
|
||||
SDValue ShufMaskOp = DAG.getNode(SPUISD::SHUFFLE_MASK, dl,
|
||||
maskVT, Pointer);
|
||||
|
||||
|
@ -16,3 +16,18 @@ define <4 x float> @splat(float %param1) {
|
||||
ret <4 x float> %val
|
||||
}
|
||||
|
||||
define void @test_insert( <2 x float>* %ptr, float %val1, float %val2 ) {
|
||||
%sl2_17_tmp1 = insertelement <2 x float> zeroinitializer, float %val1, i32 0
|
||||
;CHECK: lqa $6,
|
||||
;CHECK: shufb $4, $4, $5, $6
|
||||
%sl2_17 = insertelement <2 x float> %sl2_17_tmp1, float %val2, i32 1
|
||||
|
||||
;CHECK: cdd $5, 0($3)
|
||||
;CHECK: lqd $6, 0($3)
|
||||
;CHECK: shufb $4, $4, $6, $5
|
||||
;CHECK: stqd $4, 0($3)
|
||||
;CHECK: bi $lr
|
||||
store <2 x float> %sl2_17, <2 x float>* %ptr
|
||||
ret void
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user