mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-01 15:11:24 +00:00
Recover compile time regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44386 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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e4ad9c70e4
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cada245d06
@ -292,7 +292,7 @@ namespace llvm {
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VirtRegMap &vrm, SSARegMap *RegMap, const TargetRegisterClass* rc,
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SmallVector<int, 4> &ReMatIds,
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unsigned &NewVReg, bool &HasDef, bool &HasUse, const LoopInfo *loopInfo,
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std::vector<unsigned> &NewVRegs,
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std::map<unsigned,unsigned> &NewVRegs,
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std::vector<LiveInterval*> &NewLIs);
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void rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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LiveInterval::Ranges::const_iterator &I,
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@ -301,8 +301,8 @@ namespace llvm {
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VirtRegMap &vrm, SSARegMap *RegMap, const TargetRegisterClass* rc,
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SmallVector<int, 4> &ReMatIds, const LoopInfo *loopInfo,
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BitVector &SpillMBBs,
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std::vector<std::pair<int, unsigned> > &SpillIdxes,
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std::vector<unsigned> &NewVRegs,
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std::map<unsigned, std::pair<int, unsigned> > &SpillIdxes,
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std::map<unsigned,unsigned> &NewVRegs,
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std::vector<LiveInterval*> &NewLIs);
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static LiveInterval createInterval(unsigned Reg);
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@ -707,7 +707,8 @@ rewriteInstructionForSpills(const LiveInterval &li, bool TrySplit,
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const TargetRegisterClass* rc,
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SmallVector<int, 4> &ReMatIds,
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unsigned &NewVReg, bool &HasDef, bool &HasUse,
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const LoopInfo *loopInfo, std::vector<unsigned> &NewVRegs,
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const LoopInfo *loopInfo,
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std::map<unsigned,unsigned> &NewVRegs,
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std::vector<LiveInterval*> &NewLIs) {
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RestartInstruction:
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for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
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@ -731,6 +732,7 @@ rewriteInstructionForSpills(const LiveInterval &li, bool TrySplit,
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// all of its uses are rematerialized, simply delete it.
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if (MI == ReMatOrigDefMI && CanDelete) {
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RemoveMachineInstrFromMaps(MI);
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vrm.RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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break;
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}
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@ -823,7 +825,7 @@ rewriteInstructionForSpills(const LiveInterval &li, bool TrySplit,
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LiveInterval &nI = getOrCreateInterval(NewVReg);
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if (CreatedNewVReg) {
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NewLIs.push_back(&nI);
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NewVRegs[MI->getParent()->getNumber()] = NewVReg;
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NewVRegs.insert(std::make_pair(MI->getParent()->getNumber(), NewVReg));
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if (TrySplit)
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vrm.setIsSplitFromReg(NewVReg, li.reg);
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}
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@ -893,8 +895,8 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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SmallVector<int, 4> &ReMatIds,
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const LoopInfo *loopInfo,
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BitVector &SpillMBBs,
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std::vector<std::pair<int, unsigned> > &SpillIdxes,
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std::vector<unsigned> &NewVRegs,
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std::map<unsigned, std::pair<int, unsigned> > &SpillIdxes,
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std::map<unsigned,unsigned> &NewVRegs,
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std::vector<LiveInterval*> &NewLIs) {
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unsigned NewVReg = 0;
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unsigned index = getBaseIndex(I->start);
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@ -908,7 +910,13 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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MachineInstr *MI = getInstructionFromIndex(index);
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MachineBasicBlock *MBB = MI->getParent();
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NewVReg = !TrySplitMI ? 0 : NewVRegs[MBB->getNumber()];
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NewVReg = 0;
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if (TrySplitMI) {
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std::map<unsigned,unsigned>::const_iterator NVI =
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NewVRegs.find(MBB->getNumber());
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if (NVI != NewVRegs.end())
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NewVReg = NVI->second;
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}
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bool IsNew = NewVReg == 0;
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bool HasDef = false;
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bool HasUse = false;
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@ -936,9 +944,11 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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: anyKillInMBBAfterIdx(li, MBB, getDefIndex(index), I->valno);
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if (!HasKill) {
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unsigned MBBId = MBB->getNumber();
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if ((int)index > SpillIdxes[MBBId].first)
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// High bit specify whether this spill ought to be folded if
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// possible.
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// High bit specify whether this spill ought to be folded if
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// possible.
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std::map<unsigned, std::pair<int,unsigned> >::iterator SII =
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SpillIdxes.find(MBBId);
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if (SII == SpillIdxes.end() || (int)index > SII->second.first)
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SpillIdxes[MBBId] = std::make_pair(index, NewVReg | (1 << 31));
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SpillMBBs.set(MBBId);
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}
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@ -955,8 +965,11 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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} else if (HasUse) {
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// Use(s) following the last def, it's not safe to fold the spill.
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unsigned MBBId = MBB->getNumber();
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if ((SpillIdxes[MBBId].second & ((1<<31)-1)) == NewVReg &&
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(int)getUseIndex(index) > SpillIdxes[MBBId].first)
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std::map<unsigned, std::pair<int,unsigned> >::iterator SII =
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SpillIdxes.find(MBBId);
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if (SII != SpillIdxes.end() &&
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(SII->second.second & ((1<<31)-1)) == NewVReg &&
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(int)getUseIndex(index) > SII->second.first)
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SpillIdxes[MBBId].second &= (1<<31)-1;
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}
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@ -985,9 +998,8 @@ addIntervalsForSpills(const LiveInterval &li,
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// Each bit specify whether it a spill is required in the MBB.
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BitVector SpillMBBs(mf_->getNumBlockIDs());
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std::vector<std::pair<int, unsigned> > SpillIdxes(mf_->getNumBlockIDs(),
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std::make_pair(-1,0));
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std::vector<unsigned> NewVRegs(mf_->getNumBlockIDs(), 0);
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std::map<unsigned, std::pair<int, unsigned> > SpillIdxes;
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std::map<unsigned,unsigned> NewVRegs;
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std::vector<LiveInterval*> NewLIs;
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SSARegMap *RegMap = mf_->getSSARegMap();
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const TargetRegisterClass* rc = RegMap->getRegClass(li.reg);
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@ -1015,7 +1027,6 @@ addIntervalsForSpills(const LiveInterval &li,
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bool isLoadSS = DefIsReMat && tii_->isLoadFromStackSlot(ReMatDefMI, LdSlot);
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bool isLoad = isLoadSS ||
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(DefIsReMat && (ReMatDefMI->getInstrDescriptor()->Flags & M_LOAD_FLAG));
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vrm.removeAllSpillPtsForReg(li.reg);
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bool IsFirstRange = true;
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for (LiveInterval::Ranges::const_iterator
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I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
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@ -1087,7 +1098,6 @@ addIntervalsForSpills(const LiveInterval &li,
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if (NeedStackSlot && vrm.getPreSplitReg(li.reg) == 0)
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Slot = vrm.assignVirt2StackSlot(li.reg);
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// Create new intervals and rewrite defs and uses.
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for (LiveInterval::Ranges::const_iterator
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I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
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@ -74,7 +74,6 @@ void VirtRegMap::grow() {
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Virt2StackSlotMap.grow(LastVirtReg);
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Virt2ReMatIdMap.grow(LastVirtReg);
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Virt2SplitMap.grow(LastVirtReg);
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Virt2SpillPtsMap.grow(LastVirtReg);
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ReMatMap.grow(LastVirtReg);
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}
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@ -837,7 +836,7 @@ bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
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VRM.assignVirt2Phys(UnfoldVR, UnfoldPR);
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VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
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MII = MBB.insert(MII, FoldedMI);
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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MBB.erase(&MI);
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return true;
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}
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@ -886,7 +885,7 @@ void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
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if (CheckDef)
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--PrevMII;
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MBB.erase(LastStore);
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VRM.RemoveFromFoldedVirtMap(LastStore);
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VRM.RemoveMachineInstrFromMaps(LastStore);
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if (CheckDef) {
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// Look at defs of killed registers on the store. Mark the defs
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// as dead since the store has been deleted and they aren't
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@ -899,7 +898,7 @@ void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
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// FIXME: This assumes a remat def does not have side
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// effects.
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MBB.erase(DeadDef);
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VRM.RemoveFromFoldedVirtMap(DeadDef);
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VRM.RemoveMachineInstrFromMaps(DeadDef);
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++NumDRM;
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}
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}
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@ -965,15 +964,19 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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const TargetInstrDescriptor *TID = MI.getInstrDescriptor();
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// Insert spills here if asked to.
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std::vector<unsigned> SpillRegs = VRM.getSpillPtSpills(&MI);
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for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
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unsigned VirtReg = SpillRegs[i];
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const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
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unsigned Phys = VRM.getPhys(VirtReg);
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int StackSlot = VRM.getStackSlot(VirtReg);
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MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
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SpillRegToStackSlot(MBB, MII, i, Phys, StackSlot, RC,
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LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
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if (VRM.isSpillPt(&MI)) {
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std::vector<unsigned> &SpillRegs = VRM.getSpillPtSpills(&MI);
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for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
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unsigned VirtReg = SpillRegs[i];
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if (!VRM.getPreSplitReg(VirtReg))
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continue; // Split interval spilled again.
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const TargetRegisterClass *RC = RegMap->getRegClass(VirtReg);
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unsigned Phys = VRM.getPhys(VirtReg);
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int StackSlot = VRM.getStackSlot(VirtReg);
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MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
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SpillRegToStackSlot(MBB, MII, i, Phys, StackSlot, RC,
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LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
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}
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}
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/// ReusedOperands - Keep track of operand reuse in case we need to undo
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@ -1142,7 +1145,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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if (DeadStore) {
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DOUT << "Removed dead store:\t" << *DeadStore;
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InvalidateKills(*DeadStore, RegKills, KillOps);
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VRM.RemoveFromFoldedVirtMap(DeadStore);
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VRM.RemoveMachineInstrFromMaps(DeadStore);
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MBB.erase(DeadStore);
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MaybeDeadStores[ReuseSlot] = NULL;
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++NumDSE;
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@ -1295,7 +1298,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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} else
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DOUT << "Removing now-noop copy: " << MI;
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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MBB.erase(&MI);
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Erased = true;
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goto ProcessNextInst;
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@ -1306,7 +1309,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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if (PhysReg &&
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MRI->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) {
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MBB.insert(MII, NewMIs[0]);
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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MBB.erase(&MI);
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Erased = true;
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--NextMII; // backtrack to the unfolded instruction.
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@ -1331,7 +1334,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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MBB.insert(MII, NewMIs[0]);
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NewStore = NewMIs[1];
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MBB.insert(MII, NewStore);
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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MBB.erase(&MI);
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Erased = true;
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--NextMII;
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@ -1345,7 +1348,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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// If we get here, the store is dead, nuke it now.
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DOUT << "Removed dead store:\t" << *DeadStore;
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InvalidateKills(*DeadStore, RegKills, KillOps);
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VRM.RemoveFromFoldedVirtMap(DeadStore);
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VRM.RemoveMachineInstrFromMaps(DeadStore);
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MBB.erase(DeadStore);
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if (!NewStore)
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++NumDSE;
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@ -1405,7 +1408,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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DOUT << "Removing now-noop copy: " << MI;
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MBB.erase(&MI);
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Erased = true;
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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Spills.disallowClobberPhysReg(VirtReg);
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goto ProcessNextInst;
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}
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@ -1480,7 +1483,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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DOUT << "Removing now-noop copy: " << MI;
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MBB.erase(&MI);
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Erased = true;
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VRM.RemoveFromFoldedVirtMap(&MI);
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VRM.RemoveMachineInstrFromMaps(&MI);
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UpdateKills(*LastStore, RegKills, KillOps);
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goto ProcessNextInst;
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}
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@ -1495,7 +1498,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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}
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}
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llvm::Spiller* llvm::createSpiller() {
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switch (SpillerOpt) {
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default: assert(0 && "Unreachable!");
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@ -80,12 +80,7 @@ namespace llvm {
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/// SpillPt2VirtMap - This records the virtual registers which should
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/// be spilled right after the MachineInstr due to live interval
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/// splitting.
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DenseMap<MachineInstr*, std::vector<unsigned> > SpillPt2VirtMap;
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/// Virt2SplitMap - This records the MachineInstrs where a virtual
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/// register should be spilled due to live interval splitting.
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IndexedMap<std::vector<MachineInstr*>, VirtReg2IndexFunctor>
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Virt2SpillPtsMap;
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std::map<MachineInstr*, std::vector<unsigned> > SpillPt2VirtMap;
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/// ReMatId - Instead of assigning a stack slot to a to be rematerialized
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/// virtual register, an unique id is being assigned. This keeps track of
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@ -209,6 +204,11 @@ namespace llvm {
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ReMatMap[virtReg] = def;
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}
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/// @brief returns true if the specified MachineInstr is a spill point.
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bool isSpillPt(MachineInstr *Pt) const {
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return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
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}
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/// @brief returns the virtual registers that should be spilled due to
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/// splitting right after the specified MachineInstr.
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std::vector<unsigned> &getSpillPtSpills(MachineInstr *Pt) {
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@ -217,52 +217,26 @@ namespace llvm {
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/// @brief records the specified MachineInstr as a spill point for virtReg.
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void addSpillPoint(unsigned virtReg, MachineInstr *Pt) {
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SpillPt2VirtMap[Pt].push_back(virtReg);
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Virt2SpillPtsMap[virtReg].push_back(Pt);
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}
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/// @brief remove the virtReg from the list of registers that should be
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/// spilled (due to splitting) right after the specified MachineInstr.
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void removeRegFromSpillPt(MachineInstr *Pt, unsigned virtReg) {
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std::vector<unsigned> &Regs = SpillPt2VirtMap[Pt];
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if (Regs.back() == virtReg) // Most common case.
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Regs.pop_back();
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for (unsigned i = 0, e = Regs.size(); i != e; ++i)
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if (Regs[i] == virtReg) {
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Regs.erase(Regs.begin()+i-1);
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break;
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}
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}
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/// @brief specify virtReg is no longer being spilled due to splitting.
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void removeAllSpillPtsForReg(unsigned virtReg) {
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std::vector<MachineInstr*> &SpillPts = Virt2SpillPtsMap[virtReg];
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for (unsigned i = 0, e = SpillPts.size(); i != e; ++i)
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removeRegFromSpillPt(SpillPts[i], virtReg);
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Virt2SpillPtsMap[virtReg].clear();
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}
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/// @brief remove the specified MachineInstr as a spill point for the
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/// specified register.
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void removeRegSpillPt(unsigned virtReg, MachineInstr *Pt) {
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std::vector<MachineInstr*> &SpillPts = Virt2SpillPtsMap[virtReg];
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if (SpillPts.back() == Pt) // Most common case.
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SpillPts.pop_back();
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for (unsigned i = 0, e = SpillPts.size(); i != e; ++i)
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if (SpillPts[i] == Pt) {
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SpillPts.erase(SpillPts.begin()+i-1);
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break;
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}
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if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end())
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SpillPt2VirtMap[Pt].push_back(virtReg);
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else {
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std::vector<unsigned> Virts;
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Virts.push_back(virtReg);
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SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
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}
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}
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void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
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std::vector<unsigned> &OldRegs = SpillPt2VirtMap[Old];
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while (!OldRegs.empty()) {
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unsigned virtReg = OldRegs.back();
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OldRegs.pop_back();
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removeRegSpillPt(virtReg, Old);
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std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
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SpillPt2VirtMap.find(Old);
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if (I == SpillPt2VirtMap.end())
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return;
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while (!I->second.empty()) {
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unsigned virtReg = I->second.back();
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I->second.pop_back();
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addSpillPoint(virtReg, New);
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}
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SpillPt2VirtMap.erase(I);
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}
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/// @brief Updates information about the specified virtual register's value
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@ -282,10 +256,11 @@ namespace llvm {
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return MI2VirtMap.equal_range(MI);
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}
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/// RemoveFromFoldedVirtMap - If the specified machine instruction is in
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/// the folded instruction map, remove its entry from the map.
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void RemoveFromFoldedVirtMap(MachineInstr *MI) {
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/// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
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/// the folded instruction map and spill point map.
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void RemoveMachineInstrFromMaps(MachineInstr *MI) {
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MI2VirtMap.erase(MI);
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SpillPt2VirtMap.erase(MI);
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}
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|
||||
void print(std::ostream &OS) const;
|
||||
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Reference in New Issue
Block a user