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misched comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152699 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -113,6 +113,21 @@ SchedDefaultRegistry("default", "Use the target's default scheduler choice.",
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/// default scheduler if the target does not set a default.
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static ScheduleDAGInstrs *createCommonMachineSched(MachineSchedContext *C);
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/// Top-level MachineScheduler pass driver.
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///
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/// Visit blocks in function order. Divide each block into scheduling regions
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/// and visit them bottom-up. This is consistent with the DAG builder, which
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/// traverses scheduling regions bottom-up, but not essential.
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///
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/// This design avoids exposing scheduling boundaries to the DAG builder,
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/// simplifying the DAG builder's support for "special" target instructions,
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/// while at the same time allowing target schedulers to operate across
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/// scheduling boundaries, for example to bundle the boudary instructions
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/// without reordering them. This creates complexity, because the target
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/// scheduler must update the RegionBegin and RegionEnd positions cached by
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/// ScheduleDAGInstrs whenever adding or removing instructions. A much simpler
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/// design would be to split blocks at scheduling boundaries, but LLVM has a
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/// general bias against block splitting purely for implementation simplicity.
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bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
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// Initialize the context of the pass.
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MF = &mf;
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