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[mips][msa] lowerMSABitClear() should use SelectionDAG::getNOT() instead of using a long-winded equivalent.
Now that getConstant(-1, MVT::v2i64) works correctly on MIPS32 we can use SelectionDAG::getNOT() to produce the bitmask. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194819 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1368,24 +1368,12 @@ static SDValue lowerMSABinaryBitImmIntr(SDValue Op, SelectionDAG &DAG,
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static SDValue lowerMSABitClear(SDValue Op, SelectionDAG &DAG) {
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EVT ResTy = Op->getValueType(0);
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EVT ViaVecTy = ResTy == MVT::v2i64 ? MVT::v4i32 : ResTy;
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SDLoc DL(Op);
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SDValue One = DAG.getConstant(1, ResTy);
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SDValue Bit = DAG.getNode(ISD::SHL, DL, ResTy, One, Op->getOperand(2));
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SDValue AllOnes = DAG.getConstant(-1, MVT::i32);
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SDValue AllOnesOperands[16] = { AllOnes, AllOnes, AllOnes, AllOnes,
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AllOnes, AllOnes, AllOnes, AllOnes,
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AllOnes, AllOnes, AllOnes, AllOnes,
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AllOnes, AllOnes, AllOnes, AllOnes };
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AllOnes = DAG.getNode(ISD::BUILD_VECTOR, DL, ViaVecTy, AllOnesOperands,
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ViaVecTy.getVectorNumElements());
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if (ResTy != ViaVecTy)
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AllOnes = DAG.getNode(ISD::BITCAST, DL, ResTy, AllOnes);
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Bit = DAG.getNode(ISD::XOR, DL, ResTy, Bit, AllOnes);
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return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1), Bit);
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return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1),
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DAG.getNOT(DL, Bit, ResTy));
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}
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static SDValue lowerMSABitClearImm(SDValue Op, SelectionDAG &DAG) {
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