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Machine model: allow itineraries to be shared by different processor models.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159959 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-07-09 20:43:03 +00:00
parent 70cb1778b9
commit cb94192ff0
1 changed files with 12 additions and 0 deletions
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12
utils/TableGen/SubtargetEmitter.cpp
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@ -336,10 +336,16 @@ EmitStageAndOperandCycleData(raw_ostream &OS,
std::vector<std::vector<InstrItinerary> > std::vector<std::vector<InstrItinerary> >
&ProcItinLists) { &ProcItinLists) {
// Multiple processor models may share an itinerary record. Emit it once.
SmallPtrSet<Record*, 8> ItinsDefSet;
// Emit functional units for all the itineraries. // Emit functional units for all the itineraries.
for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
PE = SchedModels.procModelEnd(); PI != PE; ++PI) { PE = SchedModels.procModelEnd(); PI != PE; ++PI) {
if (!ItinsDefSet.insert(PI->ItinsDef))
continue;
std::vector<Record*> FUs = PI->ItinsDef->getValueAsListOfDefs("FU"); std::vector<Record*> FUs = PI->ItinsDef->getValueAsListOfDefs("FU");
if (FUs.empty()) if (FUs.empty())
continue; continue;
@ -508,12 +514,18 @@ void SubtargetEmitter::
EmitItineraries(raw_ostream &OS, EmitItineraries(raw_ostream &OS,
std::vector<std::vector<InstrItinerary> > &ProcItinLists) { std::vector<std::vector<InstrItinerary> > &ProcItinLists) {
// Multiple processor models may share an itinerary record. Emit it once.
SmallPtrSet<Record*, 8> ItinsDefSet;
// For each processor's machine model // For each processor's machine model
std::vector<std::vector<InstrItinerary> >::iterator std::vector<std::vector<InstrItinerary> >::iterator
ProcItinListsIter = ProcItinLists.begin(); ProcItinListsIter = ProcItinLists.begin();
for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
PE = SchedModels.procModelEnd(); PI != PE; ++PI) { PE = SchedModels.procModelEnd(); PI != PE; ++PI) {
Record *ItinsDef = PI->ItinsDef; Record *ItinsDef = PI->ItinsDef;
if (!ItinsDefSet.insert(ItinsDef))
continue;
// Get processor itinerary name // Get processor itinerary name
const std::string &Name = ItinsDef->getName(); const std::string &Name = ItinsDef->getName();