From cb9d4667b7159944598c178dbb6568bc20ae069b Mon Sep 17 00:00:00 2001
From: David Majnemer <david.majnemer@gmail.com>
Date: Sat, 18 May 2013 19:30:37 +0000
Subject: [PATCH] isKnownToBeAPowerOfTwo: (X & Y) + Y is a power of 2 or zero
 if y is also.

This is useful if something that looks like (x & (1 << y)) ? 64 : 32 is
the divisor in a modulo operation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182200 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Analysis/ValueTracking.cpp     | 11 +++++++++++
 test/Transforms/InstCombine/rem.ll | 14 ++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp
index 45dcc5e37ec..ca84a0c5772 100644
--- a/lib/Analysis/ValueTracking.cpp
+++ b/lib/Analysis/ValueTracking.cpp
@@ -855,6 +855,17 @@ bool llvm::isKnownToBeAPowerOfTwo(Value *V, bool OrZero, unsigned Depth) {
     return false;
   }
 
+  // Adding a power of two to the same power of two is a power of two or zero.
+  if (OrZero && match(V, m_Add(m_Value(X), m_Value(Y)))) {
+    if (match(X, m_And(m_Value(), m_Specific(Y)))) {
+      if (isKnownToBeAPowerOfTwo(Y, /*OrZero*/true, Depth))
+        return true;
+    } else if (match(Y, m_And(m_Value(), m_Specific(X)))) {
+      if (isKnownToBeAPowerOfTwo(X, /*OrZero*/true, Depth))
+        return true;
+    }
+  }
+
   // An exact divide or right shift can only shift off zero bits, so the result
   // is a power of two only if the first operand is a power of two and not
   // copying a sign bit (sdiv int_min, 2).
diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll
index 450a62ae6de..808d51eba1d 100644
--- a/test/Transforms/InstCombine/rem.ll
+++ b/test/Transforms/InstCombine/rem.ll
@@ -149,3 +149,17 @@ define i64 @test15(i32 %x, i32 %y) {
 	%urem = urem i64 %zext1, %zext0
 	ret i64 %urem
 }
+
+define i32 @test16(i32 %x, i32 %y) {
+; CHECK: @test16
+; CHECK-NEXT: [[SHR:%.*]] = lshr i32 %y, 11
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHR]], 4
+; CHECK-NEXT: [[OR:%.*]] = or i32 [[AND]], 3
+; CHECK-NEXT: [[REM:%.*]] = and i32 [[OR]], %x
+; CHECK-NEXT: ret i32 [[REM]]
+	%shr = lshr i32 %y, 11
+	%and = and i32 %shr, 4
+	%add = add i32 %and, 4
+	%rem = urem i32 %x, %add
+	ret i32 %rem
+}