From cbcdcfbda5c60d5ac7a492ef8f90b325b6026bd1 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Sat, 30 Mar 2013 01:12:05 +0000 Subject: [PATCH] [mips] Implement getRepRegClassFor in MipsSETargetLowering. This function is called in several places in ScheduleDAGRRList.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178393 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsSEISelLowering.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/lib/Target/Mips/MipsSEISelLowering.h b/lib/Target/Mips/MipsSEISelLowering.h index 04a28ce54c1..e1f949f2475 100644 --- a/lib/Target/Mips/MipsSEISelLowering.h +++ b/lib/Target/Mips/MipsSEISelLowering.h @@ -15,6 +15,7 @@ #define MipsSEISELLOWERING_H #include "MipsISelLowering.h" +#include "MipsRegisterInfo.h" namespace llvm { class MipsSETargetLowering : public MipsTargetLowering { @@ -26,6 +27,14 @@ namespace llvm { virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; + virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { + if (VT == MVT::Untyped) + return Subtarget->hasDSP() ? &Mips::ACRegsDSPRegClass : + &Mips::ACRegsRegClass; + + return TargetLowering::getRepRegClassFor(VT); + } + private: virtual bool isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,