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Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2009-01-03 19:22:06 +00:00
parent 1eb9268080
commit cc91d63ab7
2 changed files with 19 additions and 0 deletions
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2
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -3277,6 +3277,8 @@ SDValue DAGCombiner::GetDemandedBits(SDValue V, const APInt &Mask) {
if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
// See if we can recursively simplify the LHS.
unsigned Amt = RHSC->getZExtValue();
// Watch out for shift count overflow though.
if (Amt >= Mask.getBitWidth()) break;
APInt NewMask = Mask << Amt;
SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask);
if (SimplifyLHS.getNode()) {