diff --git a/lib/Transforms/InstCombine/InstCombineCasts.cpp b/lib/Transforms/InstCombine/InstCombineCasts.cpp
index e018b351082..f25dd3582b2 100644
--- a/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -955,6 +955,19 @@ Instruction *InstCombiner::visitSExt(SExtInst &CI) {
                                       ShAmt);
   }
 
+  // If this input is a trunc from our destination, then turn sext(trunc(x))
+  // into shifts.
+  if (TruncInst *TI = dyn_cast<TruncInst>(Src))
+    if (TI->hasOneUse() && TI->getOperand(0)->getType() == DestTy) {
+      uint32_t SrcBitSize = SrcTy->getScalarSizeInBits();
+      uint32_t DestBitSize = DestTy->getScalarSizeInBits();
+      
+      // We need to emit a shl + ashr to do the sign extend.
+      Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize);
+      Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext");
+      return BinaryOperator::CreateAShr(Res, ShAmt);
+    }
+  
   // If the input is a shl/ashr pair of a same constant, then this is a sign
   // extension from a smaller value.  If we could trust arbitrary bitwidth
   // integers, we could turn this into a truncate to the smaller bit and then
diff --git a/lib/Transforms/InstCombine/InstCombineShifts.cpp b/lib/Transforms/InstCombine/InstCombineShifts.cpp
index fe91da1b6af..321c91d57d2 100644
--- a/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -404,12 +404,26 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
   
   if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
     // If the input is a SHL by the same constant (ashr (shl X, C), C), then we
-    // have a sign-extend idiom.  If the input value is known to already be sign
-    // extended enough, delete the extension.
+    // have a sign-extend idiom.
     Value *X;
-    if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1))) &&
-        ComputeNumSignBits(X) > Op1C->getZExtValue())
-      return ReplaceInstUsesWith(I, X);
+    if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
+      // If the input value is known to already be sign extended enough, delete
+      // the extension.
+      if (ComputeNumSignBits(X) > Op1C->getZExtValue())
+        return ReplaceInstUsesWith(I, X);
+
+      // If the input is an extension from the shifted amount value, e.g.
+      //   %x = zext i8 %A to i32
+      //   %y = shl i32 %x, 24
+      //   %z = ashr %y, 24
+      // then turn this into "z = sext i8 A to i32".
+      if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
+        uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
+        uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
+        if (Op1C->getZExtValue() == DestBits-SrcBits)
+          return new SExtInst(ZI->getOperand(0), ZI->getType());
+      }
+    }
   }            
   
   // See if we can turn a signed shr into an unsigned shr.
diff --git a/test/Transforms/InstCombine/signext.ll b/test/Transforms/InstCombine/signext.ll
index 098dde109f8..1c52b62df4e 100644
--- a/test/Transforms/InstCombine/signext.ll
+++ b/test/Transforms/InstCombine/signext.ll
@@ -8,8 +8,8 @@ define i32 @test1(i32 %x) {
         %tmp.3 = add i32 %tmp.2, 32768          ; <i32> [#uses=1]
         ret i32 %tmp.3
 ; CHECK: @test1
-; CHECK: %sext = trunc i32 %x to i16
-; CHECK: %tmp.3 = sext i16 %sext to i32
+; CHECK: %sext1 = shl i32 %x, 16
+; CHECK: %tmp.3 = ashr i32 %sext1, 16
 ; CHECK: ret i32 %tmp.3
 }
 
@@ -19,8 +19,8 @@ define i32 @test2(i32 %x) {
         %tmp.3 = add i32 %tmp.2, -32768         ; <i32> [#uses=1]
         ret i32 %tmp.3
 ; CHECK: @test2
-; CHECK: %sext = trunc i32 %x to i16
-; CHECK: %tmp.3 = sext i16 %sext to i32
+; CHECK: %sext1 = shl i32 %x, 16
+; CHECK: %tmp.3 = ashr i32 %sext1, 16
 ; CHECK: ret i32 %tmp.3
 }
 
@@ -50,8 +50,8 @@ define i32 @test5(i32 %x) {
         %tmp.3 = add i32 %tmp.2, -128           ; <i32> [#uses=1]
         ret i32 %tmp.3
 ; CHECK: @test5
-; CHECK: %sext = trunc i32 %x to i8
-; CHECK: %tmp.3 = sext i8 %sext to i32
+; CHECK: %sext1 = shl i32 %x, 24
+; CHECK: %tmp.3 = ashr i32 %sext1, 24
 ; CHECK: ret i32 %tmp.3
 }
 
@@ -65,3 +65,12 @@ define i32 @test6(i32 %x) {
 ; CHECK: ret i32 %tmp.4
 }
 
+define i32 @test7(i16 %P) {
+  %tmp.1 = zext i16 %P to i32                     ; <i32> [#uses=1]
+  %sext1 = shl i32 %tmp.1, 16                     ; <i32> [#uses=1]
+  %tmp.5 = ashr i32 %sext1, 16                    ; <i32> [#uses=1]
+  ret i32 %tmp.5
+; CHECK: @test7
+; CHECK: %tmp.5 = sext i16 %P to i32
+; CHECK: ret i32 %tmp.5
+}