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https://github.com/c64scene-ar/llvm-6502.git
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X86 horizontal vector reduction cost model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191021 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Yi Jiang
parent
e56a4d9236
commit
cdfb43f0a6
@ -101,6 +101,9 @@ public:
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unsigned AddressSpace) const;
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virtual unsigned getAddressComputationCost(Type *PtrTy, bool IsComplex) const;
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virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
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bool IsPairwiseForm) const;
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/// @}
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};
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@ -605,3 +608,84 @@ unsigned X86TTI::getAddressComputationCost(Type *Ty, bool IsComplex) const {
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return TargetTransformInfo::getAddressComputationCost(Ty, IsComplex);
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}
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unsigned X86TTI::getReductionCost(unsigned Opcode, Type *ValTy,
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bool IsPairwise) const {
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std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy);
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MVT MTy = LT.second;
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int ISD = TLI->InstructionOpcodeToISD(Opcode);
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assert(ISD && "Invalid opcode");
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// We use the Intel Architecture Code Analyzer(IACA) to measure the throughput
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// and make it as the cost.
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static const CostTblEntry<MVT::SimpleValueType> SSE42CostTblPairWise[] = {
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{ ISD::FADD, MVT::v2f64, 2 },
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{ ISD::FADD, MVT::v4f32, 4 },
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{ ISD::ADD, MVT::v2i64, 2 }, // The data reported by the IACA tool is "1.6".
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{ ISD::ADD, MVT::v4i32, 3 }, // The data reported by the IACA tool is "3.5".
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{ ISD::ADD, MVT::v8i16, 5 },
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};
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static const CostTblEntry<MVT::SimpleValueType> AVX1CostTblPairWise[] = {
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{ ISD::FADD, MVT::v4f32, 4 },
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{ ISD::FADD, MVT::v4f64, 5 },
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{ ISD::FADD, MVT::v8f32, 7 },
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{ ISD::ADD, MVT::v2i64, 1 }, // The data reported by the IACA tool is "1.5".
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{ ISD::ADD, MVT::v4i32, 3 }, // The data reported by the IACA tool is "3.5".
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{ ISD::ADD, MVT::v4i64, 5 }, // The data reported by the IACA tool is "4.8".
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{ ISD::ADD, MVT::v8i16, 5 },
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{ ISD::ADD, MVT::v8i32, 5 },
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};
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static const CostTblEntry<MVT::SimpleValueType> SSE42CostTblNoPairWise[] = {
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{ ISD::FADD, MVT::v2f64, 2 },
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{ ISD::FADD, MVT::v4f32, 4 },
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{ ISD::ADD, MVT::v2i64, 2 }, // The data reported by the IACA tool is "1.6".
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{ ISD::ADD, MVT::v4i32, 3 }, // The data reported by the IACA tool is "3.3".
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{ ISD::ADD, MVT::v8i16, 4 }, // The data reported by the IACA tool is "4.3".
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};
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static const CostTblEntry<MVT::SimpleValueType> AVX1CostTblNoPairWise[] = {
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{ ISD::FADD, MVT::v4f32, 3 },
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{ ISD::FADD, MVT::v4f64, 3 },
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{ ISD::FADD, MVT::v8f32, 4 },
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{ ISD::ADD, MVT::v2i64, 1 }, // The data reported by the IACA tool is "1.5".
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{ ISD::ADD, MVT::v4i32, 3 }, // The data reported by the IACA tool is "2.8".
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{ ISD::ADD, MVT::v4i64, 3 },
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{ ISD::ADD, MVT::v8i16, 4 },
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{ ISD::ADD, MVT::v8i32, 5 },
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};
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if (IsPairwise) {
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if (ST->hasAVX()) {
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int Idx = CostTableLookup(AVX1CostTblPairWise, ISD, MTy);
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if (Idx != -1)
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return LT.first * AVX1CostTblPairWise[Idx].Cost;
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}
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if (ST->hasSSE42()) {
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int Idx = CostTableLookup(SSE42CostTblPairWise, ISD, MTy);
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if (Idx != -1)
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return LT.first * SSE42CostTblPairWise[Idx].Cost;
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}
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} else {
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if (ST->hasAVX()) {
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int Idx = CostTableLookup(AVX1CostTblNoPairWise, ISD, MTy);
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if (Idx != -1)
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return LT.first * AVX1CostTblNoPairWise[Idx].Cost;
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}
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if (ST->hasSSE42()) {
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int Idx = CostTableLookup(SSE42CostTblNoPairWise, ISD, MTy);
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if (Idx != -1)
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return LT.first * SSE42CostTblNoPairWise[Idx].Cost;
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}
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}
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return TargetTransformInfo::getReductionCost(Opcode, ValTy, IsPairwise);
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}
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@ -1,4 +1,7 @@
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; RUN: opt < %s -cost-model -costmodel-reduxcost=true -analyze -mcpu=core2 -mtriple=x86_64-apple-darwin | FileCheck %s
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; RUN: opt < %s -cost-model -costmodel-reduxcost=true -analyze -mcpu=corei7 -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=SSE3
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; RUN: opt < %s -cost-model -costmodel-reduxcost=true -analyze -mcpu=corei7-avx -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=AVX
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; RUN: opt < %s -cost-model -costmodel-reduxcost=true -analyze -mcpu=core-avx2 -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=AVX2
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define fastcc float @reduction_cost_float(<4 x float> %rdx) {
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%rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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@ -55,6 +58,7 @@ define fastcc float @pairwise_hadd(<4 x float> %rdx, float %f1) {
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%r2 = fadd float %r, %f1
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ret float %r2
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}
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define fastcc float @pairwise_hadd_assoc(<4 x float> %rdx, float %f1) {
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%rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
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<4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
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@ -92,3 +96,270 @@ define fastcc float @pairwise_hadd_skip_first(<4 x float> %rdx, float %f1) {
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%r2 = fadd float %r, %f1
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ret float %r2
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}
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define fastcc double @no_pairwise_reduction2double(<2 x double> %rdx, double %f1) {
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%rdx.shuf = shufflevector <2 x double> %rdx, <2 x double> undef, <2 x i32> <i32 1, i32 undef>
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%bin.rdx = fadd <2 x double> %rdx, %rdx.shuf
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; SSE3: cost of 2 {{.*}} extractelement
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; AVX: cost of 2 {{.*}} extractelement
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; AVX2: cost of 2 {{.*}} extractelement
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%r = extractelement <2 x double> %bin.rdx, i32 0
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ret double %r
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}
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define fastcc float @no_pairwise_reduction4float(<4 x float> %rdx, float %f1) {
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%rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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%bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
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%rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
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; SSE3: cost of 4 {{.*}} extractelement
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; AVX: cost of 3 {{.*}} extractelement
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; AVX2: cost of 3 {{.*}} extractelement
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%r = extractelement <4 x float> %bin.rdx8, i32 0
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ret float %r
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}
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define fastcc double @no_pairwise_reduction4double(<4 x double> %rdx, double %f1) {
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%rdx.shuf = shufflevector <4 x double> %rdx, <4 x double> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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%bin.rdx = fadd <4 x double> %rdx, %rdx.shuf
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%rdx.shuf7 = shufflevector <4 x double> %bin.rdx, <4 x double> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <4 x double> %bin.rdx, %rdx.shuf7
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; AVX: cost of 3 {{.*}} extractelement
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; AVX2: cost of 3 {{.*}} extractelement
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%r = extractelement <4 x double> %bin.rdx8, i32 0
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ret double %r
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}
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define fastcc float @no_pairwise_reduction8float(<8 x float> %rdx, float %f1) {
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%rdx.shuf3 = shufflevector <8 x float> %rdx, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx4 = fadd <8 x float> %rdx, %rdx.shuf3
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%rdx.shuf = shufflevector <8 x float> %bin.rdx4, <8 x float> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx = fadd <8 x float> %bin.rdx4, %rdx.shuf
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%rdx.shuf7 = shufflevector <8 x float> %bin.rdx, <8 x float> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <8 x float> %bin.rdx, %rdx.shuf7
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; AVX: cost of 4 {{.*}} extractelement
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; AVX2: cost of 4 {{.*}} extractelement
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%r = extractelement <8 x float> %bin.rdx8, i32 0
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ret float %r
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}
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define fastcc i64 @no_pairwise_reduction2i64(<2 x i64> %rdx, i64 %f1) {
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%rdx.shuf = shufflevector <2 x i64> %rdx, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
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%bin.rdx = add <2 x i64> %rdx, %rdx.shuf
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; SSE3: cost of 2 {{.*}} extractelement
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; AVX: cost of 1 {{.*}} extractelement
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; AVX2: cost of 1 {{.*}} extractelement
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%r = extractelement <2 x i64> %bin.rdx, i32 0
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ret i64 %r
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}
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define fastcc i32 @no_pairwise_reduction4i32(<4 x i32> %rdx, i32 %f1) {
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%rdx.shuf = shufflevector <4 x i32> %rdx, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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%bin.rdx = add <4 x i32> %rdx, %rdx.shuf
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%rdx.shuf7 = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = add <4 x i32> %bin.rdx, %rdx.shuf7
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; SSE3: cost of 3 {{.*}} extractelement
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; AVX: cost of 3 {{.*}} extractelement
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; AVX2: cost of 3 {{.*}} extractelement
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%r = extractelement <4 x i32> %bin.rdx8, i32 0
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ret i32 %r
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}
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define fastcc i64 @no_pairwise_reduction4i64(<4 x i64> %rdx, i64 %f1) {
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%rdx.shuf = shufflevector <4 x i64> %rdx, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
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%bin.rdx = add <4 x i64> %rdx, %rdx.shuf
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%rdx.shuf7 = shufflevector <4 x i64> %bin.rdx, <4 x i64> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = add <4 x i64> %bin.rdx, %rdx.shuf7
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; AVX: cost of 3 {{.*}} extractelement
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; AVX2: cost of 3 {{.*}} extractelement
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%r = extractelement <4 x i64> %bin.rdx8, i32 0
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ret i64 %r
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}
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define fastcc i16 @no_pairwise_reduction8i16(<8 x i16> %rdx, i16 %f1) {
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%rdx.shuf3 = shufflevector <8 x i16> %rdx, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx4 = add <8 x i16> %rdx, %rdx.shuf3
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%rdx.shuf = shufflevector <8 x i16> %bin.rdx4, <8 x i16> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx = add <8 x i16> %bin.rdx4, %rdx.shuf
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%rdx.shuf7 = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = add <8 x i16> %bin.rdx, %rdx.shuf7
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; SSE3: cost of 4 {{.*}} extractelement
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; AVX: cost of 4 {{.*}} extractelement
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; AVX2: cost of 4 {{.*}} extractelement
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%r = extractelement <8 x i16> %bin.rdx8, i32 0
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ret i16 %r
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}
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define fastcc i32 @no_pairwise_reduction8i32(<8 x i32> %rdx, i32 %f1) {
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%rdx.shuf3 = shufflevector <8 x i32> %rdx, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx4 = add <8 x i32> %rdx, %rdx.shuf3
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%rdx.shuf = shufflevector <8 x i32> %bin.rdx4, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx = add <8 x i32> %bin.rdx4, %rdx.shuf
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%rdx.shuf7 = shufflevector <8 x i32> %bin.rdx, <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = add <8 x i32> %bin.rdx, %rdx.shuf7
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; AVX: cost of 5 {{.*}} extractelement
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; AVX2: cost of 5 {{.*}} extractelement
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%r = extractelement <8 x i32> %bin.rdx8, i32 0
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ret i32 %r
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}
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define fastcc double @pairwise_reduction2double(<2 x double> %rdx, double %f1) {
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%rdx.shuf.1.0 = shufflevector <2 x double> %rdx, <2 x double> undef, <2 x i32> <i32 0, i32 undef>
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%rdx.shuf.1.1 = shufflevector <2 x double> %rdx, <2 x double> undef, <2 x i32> <i32 1, i32 undef>
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%bin.rdx8 = fadd <2 x double> %rdx.shuf.1.0, %rdx.shuf.1.1
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; SSE3: cost of 2 {{.*}} extractelement
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; AVX: cost of 2 {{.*}} extractelement
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; AVX2: cost of 2 {{.*}} extractelement
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%r = extractelement <2 x double> %bin.rdx8, i32 0
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ret double %r
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}
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define fastcc float @pairwise_reduction4float(<4 x float> %rdx, float %f1) {
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%rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
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%rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
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%bin.rdx = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
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%rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
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; SSE3: cost of 4 {{.*}} extractelement
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; AVX: cost of 4 {{.*}} extractelement
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; AVX2: cost of 4 {{.*}} extractelement
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%r = extractelement <4 x float> %bin.rdx8, i32 0
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ret float %r
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}
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define fastcc double @pairwise_reduction4double(<4 x double> %rdx, double %f1) {
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%rdx.shuf.0.0 = shufflevector <4 x double> %rdx, <4 x double> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
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%rdx.shuf.0.1 = shufflevector <4 x double> %rdx, <4 x double> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
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%bin.rdx = fadd <4 x double> %rdx.shuf.0.0, %rdx.shuf.0.1
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%rdx.shuf.1.0 = shufflevector <4 x double> %bin.rdx, <4 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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%rdx.shuf.1.1 = shufflevector <4 x double> %bin.rdx, <4 x double> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <4 x double> %rdx.shuf.1.0, %rdx.shuf.1.1
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; AVX: cost of 5 {{.*}} extractelement
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; AVX2: cost of 5 {{.*}} extractelement
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%r = extractelement <4 x double> %bin.rdx8, i32 0
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ret double %r
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}
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define fastcc float @pairwise_reduction8float(<8 x float> %rdx, float %f1) {
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%rdx.shuf.0.0 = shufflevector <8 x float> %rdx, <8 x float> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6,i32 undef, i32 undef, i32 undef, i32 undef>
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%rdx.shuf.0.1 = shufflevector <8 x float> %rdx, <8 x float> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx = fadd <8 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
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%rdx.shuf.1.0 = shufflevector <8 x float> %bin.rdx, <8 x float> undef,<8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%rdx.shuf.1.1 = shufflevector <8 x float> %bin.rdx, <8 x float> undef,<8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx8 = fadd <8 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
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%rdx.shuf.2.0 = shufflevector <8 x float> %bin.rdx8, <8 x float> undef,<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%rdx.shuf.2.1 = shufflevector <8 x float> %bin.rdx8, <8 x float> undef,<8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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%bin.rdx9 = fadd <8 x float> %rdx.shuf.2.0, %rdx.shuf.2.1
|
||||
|
||||
; AVX: cost of 7 {{.*}} extractelement
|
||||
; AVX2: cost of 7 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <8 x float> %bin.rdx9, i32 0
|
||||
ret float %r
|
||||
}
|
||||
|
||||
define fastcc i64 @pairwise_reduction2i64(<2 x i64> %rdx, i64 %f1) {
|
||||
%rdx.shuf.1.0 = shufflevector <2 x i64> %rdx, <2 x i64> undef, <2 x i32> <i32 0, i32 undef>
|
||||
%rdx.shuf.1.1 = shufflevector <2 x i64> %rdx, <2 x i64> undef, <2 x i32> <i32 1, i32 undef>
|
||||
%bin.rdx8 = add <2 x i64> %rdx.shuf.1.0, %rdx.shuf.1.1
|
||||
|
||||
; SSE3: cost of 2 {{.*}} extractelement
|
||||
; AVX: cost of 1 {{.*}} extractelement
|
||||
; AVX2: cost of 1 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <2 x i64> %bin.rdx8, i32 0
|
||||
ret i64 %r
|
||||
}
|
||||
|
||||
define fastcc i32 @pairwise_reduction4i32(<4 x i32> %rdx, i32 %f1) {
|
||||
%rdx.shuf.0.0 = shufflevector <4 x i32> %rdx, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
|
||||
%rdx.shuf.0.1 = shufflevector <4 x i32> %rdx, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
|
||||
%bin.rdx = add <4 x i32> %rdx.shuf.0.0, %rdx.shuf.0.1
|
||||
%rdx.shuf.1.0 = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.1.1 = shufflevector <4 x i32> %bin.rdx, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx8 = add <4 x i32> %rdx.shuf.1.0, %rdx.shuf.1.1
|
||||
|
||||
; SSE3: cost of 3 {{.*}} extractelement
|
||||
; AVX: cost of 3 {{.*}} extractelement
|
||||
; AVX2: cost of 3 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <4 x i32> %bin.rdx8, i32 0
|
||||
ret i32 %r
|
||||
}
|
||||
|
||||
define fastcc i64 @pairwise_reduction4i64(<4 x i64> %rdx, i64 %f1) {
|
||||
%rdx.shuf.0.0 = shufflevector <4 x i64> %rdx, <4 x i64> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
|
||||
%rdx.shuf.0.1 = shufflevector <4 x i64> %rdx, <4 x i64> undef, <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
|
||||
%bin.rdx = add <4 x i64> %rdx.shuf.0.0, %rdx.shuf.0.1
|
||||
%rdx.shuf.1.0 = shufflevector <4 x i64> %bin.rdx, <4 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.1.1 = shufflevector <4 x i64> %bin.rdx, <4 x i64> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx8 = add <4 x i64> %rdx.shuf.1.0, %rdx.shuf.1.1
|
||||
|
||||
; AVX: cost of 5 {{.*}} extractelement
|
||||
; AVX2: cost of 5 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <4 x i64> %bin.rdx8, i32 0
|
||||
ret i64 %r
|
||||
}
|
||||
|
||||
define fastcc i16 @pairwise_reduction8i16(<8 x i16> %rdx, i16 %f1) {
|
||||
%rdx.shuf.0.0 = shufflevector <8 x i16> %rdx, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6,i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.0.1 = shufflevector <8 x i16> %rdx, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx = add <8 x i16> %rdx.shuf.0.0, %rdx.shuf.0.1
|
||||
%rdx.shuf.1.0 = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef,<8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.1.1 = shufflevector <8 x i16> %bin.rdx, <8 x i16> undef,<8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx8 = add <8 x i16> %rdx.shuf.1.0, %rdx.shuf.1.1
|
||||
%rdx.shuf.2.0 = shufflevector <8 x i16> %bin.rdx8, <8 x i16> undef,<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.2.1 = shufflevector <8 x i16> %bin.rdx8, <8 x i16> undef,<8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx9 = add <8 x i16> %rdx.shuf.2.0, %rdx.shuf.2.1
|
||||
|
||||
; SSE3: cost of 5 {{.*}} extractelement
|
||||
; AVX: cost of 5 {{.*}} extractelement
|
||||
; AVX2: cost of 5 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <8 x i16> %bin.rdx9, i32 0
|
||||
ret i16 %r
|
||||
}
|
||||
|
||||
define fastcc i32 @pairwise_reduction8i32(<8 x i32> %rdx, i32 %f1) {
|
||||
%rdx.shuf.0.0 = shufflevector <8 x i32> %rdx, <8 x i32> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6,i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.0.1 = shufflevector <8 x i32> %rdx, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7,i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx = add <8 x i32> %rdx.shuf.0.0, %rdx.shuf.0.1
|
||||
%rdx.shuf.1.0 = shufflevector <8 x i32> %bin.rdx, <8 x i32> undef,<8 x i32> <i32 0, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.1.1 = shufflevector <8 x i32> %bin.rdx, <8 x i32> undef,<8 x i32> <i32 1, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx8 = add <8 x i32> %rdx.shuf.1.0, %rdx.shuf.1.1
|
||||
%rdx.shuf.2.0 = shufflevector <8 x i32> %bin.rdx8, <8 x i32> undef,<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%rdx.shuf.2.1 = shufflevector <8 x i32> %bin.rdx8, <8 x i32> undef,<8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||
%bin.rdx9 = add <8 x i32> %rdx.shuf.2.0, %rdx.shuf.2.1
|
||||
|
||||
; AVX: cost of 5 {{.*}} extractelement
|
||||
; AVX2: cost of 5 {{.*}} extractelement
|
||||
|
||||
%r = extractelement <8 x i32> %bin.rdx9, i32 0
|
||||
ret i32 %r
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user