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Add assertion for scale verification.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12120 91177308-0d34-0410-b5e6-96231b3b80d8
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Alkis Evlogimenos
2004-03-04 18:05:02 +00:00
parent 9cccb8aec7
commit ce1e500e2f
1 changed files with 1 additions and 0 deletions
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lib/Target/X86/X86InstrBuilder.h
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@ -54,6 +54,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
unsigned Scale, unsigned Scale,
unsigned IndexReg, unsigned IndexReg,
unsigned Disp) { unsigned Disp) {
assert (Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8);
return MIB.addReg(BaseReg).addZImm(Scale).addReg(IndexReg).addSImm(Disp); return MIB.addReg(BaseReg).addZImm(Scale).addReg(IndexReg).addSImm(Disp);
} }