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[ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM side of the changes. ARMV6 family LLVM implementation. +-------------------------------------+ | ARMV6 | +----------------+--------------------+ | ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors +----------------+--------------------+ have support for hint instructions | ARMV6T2 (arm,thumb,thumb2) | (SEV/WFE/WFI/NOP/YIELD). They can +-------------------------------------+ be either real or default to NOP. | ARMV7 (arm,thumb,thumb2) | The two processors also use +-------------------------------------+ different encoding for them. Patch by Vinicius Tinti. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232468 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -56,13 +56,14 @@ protected:
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ARMProcClassEnum ARMProcClass;
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/// HasV4TOps, HasV5TOps, HasV5TEOps,
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/// HasV6Ops, HasV6MOps, HasV6T2Ops, HasV7Ops, HasV8Ops -
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/// HasV6Ops, HasV6MOps, HasV6KOps, HasV6T2Ops, HasV7Ops, HasV8Ops -
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/// Specify whether target support specific ARM ISA variants.
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bool HasV4TOps;
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bool HasV5TOps;
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bool HasV5TEOps;
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bool HasV6Ops;
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bool HasV6MOps;
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bool HasV6KOps;
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bool HasV6T2Ops;
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bool HasV7Ops;
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bool HasV8Ops;
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@@ -284,6 +285,7 @@ public:
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bool hasV5TEOps() const { return HasV5TEOps; }
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bool hasV6Ops() const { return HasV6Ops; }
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bool hasV6MOps() const { return HasV6MOps; }
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bool hasV6KOps() const { return HasV6KOps; }
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bool hasV6T2Ops() const { return HasV6T2Ops; }
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bool hasV7Ops() const { return HasV7Ops; }
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bool hasV8Ops() const { return HasV8Ops; }
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