Moved predict and annul fields to the end of each individual instruction

class, because they are currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2003-06-05 23:33:15 +00:00
parent d4ad1d10bc
commit ce50542179

View File

@ -7,40 +7,42 @@
//
class F2 : InstV9 { // Format 2 instructions
bits<3> op2;
set op = 0; // Op = 0
set op = 0; // Op = 0
set Inst{24-22} = op2;
}
// Format 2.1 instructions
class F2_1<string name> : F2 {
bits<22> imm;
bits<5> rd;
bits<5> rd;
set Name = name;
set Name = name;
set Inst{29-25} = rd;
set Inst{21-0} = imm;
}
class F2_br : F2 { // Format 2 Branch instruction
bit annul; // All branches have an annul bit
set Inst{29} = annul;
set isBranch = 1; // All instances are branch instructions
}
class F2_2<bits<4> cond, string name> : F2_br { // Format 2.2 instructions
bits<22> disp;
bit annul;
set Name = name;
set Inst{29} = annul;
set Inst{28-25} = cond;
set Inst{21-0} = disp;
}
class F2_3<bits<4> cond, string name> : F2_br { // Format 2.3 instructions
bits<2> cc;
bits<2> cc;
bits<19> disp;
bit predict;
bit predict;
bit annul;
set Name = name;
set Inst{29} = annul;
set Inst{28-25} = cond;
set Inst{21-20} = cc;
set Inst{19} = predict;
@ -48,14 +50,15 @@ class F2_3<bits<4> cond, string name> : F2_br { // Format 2.3 instructions
}
class F2_4<bits<3> rcond, string name> : F2_br { // Format 2.4 instructions
bit predict;
bits<5> rs1;
bits<16> disp;
bits<5> rs1;
bits<16> disp;
bit predict;
bit annul;
set Name = name;
set Name = name;
set Inst{29} = annul;
set Inst{28} = 0;
set Inst{27-25} = rcond;
// Inst{24-22} = op2 field
set Inst{21-20} = disp{15-14};
set Inst{19} = predict;
set Inst{18-14} = rs1;