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Encode condition code for Thumb1 conditional branch instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120865 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -475,10 +475,13 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
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// FIXME: should be able to write a pattern for ARMBrcond, but can't use
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// a two-value operand where a dag node expects two operands. :(
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let isBranch = 1, isTerminator = 1 in
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def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), IIC_Br,
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"b$cc\t$target",
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def tBcc : T1I<(outs), (ins brtarget:$target, pred:$p), IIC_Br,
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"b${p}\t$target",
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[/*(ARMbrcond bb:$target, imm:$cc)*/]>,
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T1Encoding<{1,1,0,1,?,?}>;
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T1Encoding<{1,1,0,1,?,?}> {
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bits<4> p;
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let Inst{11-8} = p;
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}
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// Compare and branch on zero / non-zero
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let isBranch = 1, isTerminator = 1 in {
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