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https://github.com/c64scene-ar/llvm-6502.git
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Work around a nasty tblgen bug where it doesn't add operands for varargs
nodes correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -152,6 +152,8 @@ namespace {
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private:
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private:
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SDOperand SelectSETCC(SDOperand Op);
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SDOperand SelectSETCC(SDOperand Op);
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void MySelect_PPCbctrl(SDOperand &Result, SDOperand N);
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void MySelect_PPCcall(SDOperand &Result, SDOperand N);
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};
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};
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}
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}
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@ -1093,6 +1095,7 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
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return;
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return;
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}
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}
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case ISD::BRIND: {
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case ISD::BRIND: {
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// FIXME: Should custom lower this.
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SDOperand Chain, Target;
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SDOperand Chain, Target;
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Select(Chain, N->getOperand(0));
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Select(Chain, N->getOperand(0));
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Select(Target,N->getOperand(1));
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Select(Target,N->getOperand(1));
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@ -1101,12 +1104,166 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
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Result = CurDAG->SelectNodeTo(N, PPC::BCTR, MVT::Other, Chain);
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Result = CurDAG->SelectNodeTo(N, PPC::BCTR, MVT::Other, Chain);
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return;
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return;
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}
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}
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// FIXME: These are manually selected because tblgen isn't handling varargs
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// nodes correctly.
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case PPCISD::BCTRL: MySelect_PPCbctrl(Result, Op); return;
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case PPCISD::CALL: MySelect_PPCcall(Result, Op); return;
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}
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}
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SelectCode(Result, Op);
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SelectCode(Result, Op);
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}
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}
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// FIXME: This is manually selected because tblgen isn't handling varargs nodes
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// correctly.
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void PPCDAGToDAGISel::MySelect_PPCbctrl(SDOperand &Result, SDOperand N) {
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SDOperand Chain(0, 0);
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SDOperand InFlag(0, 0);
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SDNode *ResNode;
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bool hasFlag =
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N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;
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std::vector<SDOperand> Ops;
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// Push varargs arguments, including optional flag.
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for (unsigned i = 1, e = N.getNumOperands()-hasFlag; i != e; ++i) {
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Select(Chain, N.getOperand(i));
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Ops.push_back(Chain);
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}
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Select(Chain, N.getOperand(0));
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Ops.push_back(Chain);
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if (hasFlag) {
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Select(Chain, N.getOperand(N.getNumOperands()-1));
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Ops.push_back(Chain);
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}
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ResNode = CurDAG->getTargetNode(PPC::BCTRL, MVT::Other, MVT::Flag, Ops);
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Chain = SDOperand(ResNode, 0);
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InFlag = SDOperand(ResNode, 1);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 0, Chain.Val,
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Chain.ResNo);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 1, InFlag.Val,
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InFlag.ResNo);
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Result = SDOperand(ResNode, N.ResNo);
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return;
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}
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// FIXME: This is manually selected because tblgen isn't handling varargs nodes
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// correctly.
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void PPCDAGToDAGISel::MySelect_PPCcall(SDOperand &Result, SDOperand N) {
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SDOperand Chain(0, 0);
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SDOperand InFlag(0, 0);
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SDOperand N1(0, 0);
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SDOperand Tmp0(0, 0);
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SDNode *ResNode;
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Chain = N.getOperand(0);
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N1 = N.getOperand(1);
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// Pattern: (PPCcall:void (imm:i32):$func)
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// Emits: (BLA:void (imm:i32):$func)
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// Pattern complexity = 4 cost = 1
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if (N1.getOpcode() == ISD::Constant) {
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unsigned Tmp0C = (unsigned)cast<ConstantSDNode>(N1)->getValue();
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std::vector<SDOperand> Ops;
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Ops.push_back(CurDAG->getTargetConstant(Tmp0C, MVT::i32));
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bool hasFlag =
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N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;
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// Push varargs arguments, not including optional flag.
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for (unsigned i = 2, e = N.getNumOperands()-hasFlag; i != e; ++i) {
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Select(Chain, N.getOperand(i));
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Ops.push_back(Chain);
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}
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Select(Chain, N.getOperand(0));
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Ops.push_back(Chain);
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if (hasFlag) {
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Select(Chain, N.getOperand(N.getNumOperands()-1));
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Ops.push_back(Chain);
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}
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ResNode = CurDAG->getTargetNode(PPC::BLA, MVT::Other, MVT::Flag, Ops);
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Chain = SDOperand(ResNode, 0);
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InFlag = SDOperand(ResNode, 1);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 0, Chain.Val, Chain.ResNo);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 1, InFlag.Val, InFlag.ResNo);
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Result = SDOperand(ResNode, N.ResNo);
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return;
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}
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// Pattern: (PPCcall:void (tglobaladdr:i32):$dst)
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// Emits: (BL:void (tglobaladdr:i32):$dst)
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// Pattern complexity = 4 cost = 1
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if (N1.getOpcode() == ISD::TargetGlobalAddress) {
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std::vector<SDOperand> Ops;
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Ops.push_back(N1);
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bool hasFlag =
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N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;
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// Push varargs arguments, not including optional flag.
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for (unsigned i = 2, e = N.getNumOperands()-hasFlag; i != e; ++i) {
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Select(Chain, N.getOperand(i));
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Ops.push_back(Chain);
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}
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Select(Chain, N.getOperand(0));
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Ops.push_back(Chain);
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if (hasFlag) {
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Select(Chain, N.getOperand(N.getNumOperands()-1));
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Ops.push_back(Chain);
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}
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ResNode = CurDAG->getTargetNode(PPC::BL, MVT::Other, MVT::Flag, Ops);
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Chain = SDOperand(ResNode, 0);
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InFlag = SDOperand(ResNode, 1);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 0, Chain.Val, Chain.ResNo);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 1, InFlag.Val, InFlag.ResNo);
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Result = SDOperand(ResNode, N.ResNo);
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return;
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}
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// Pattern: (PPCcall:void (texternalsym:i32):$dst)
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// Emits: (BL:void (texternalsym:i32):$dst)
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// Pattern complexity = 4 cost = 1
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if (N1.getOpcode() == ISD::TargetExternalSymbol) {
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std::vector<SDOperand> Ops;
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Ops.push_back(N1);
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bool hasFlag =
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N.getOperand(N.getNumOperands()-1).getValueType() == MVT::Flag;
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// Push varargs arguments, not including optional flag.
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for (unsigned i = 2, e = N.getNumOperands()-hasFlag; i != e; ++i) {
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Select(Chain, N.getOperand(i));
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Ops.push_back(Chain);
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}
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Select(Chain, N.getOperand(0));
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Ops.push_back(Chain);
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if (hasFlag) {
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Select(Chain, N.getOperand(N.getNumOperands()-1));
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Ops.push_back(Chain);
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}
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ResNode = CurDAG->getTargetNode(PPC::BL, MVT::Other, MVT::Flag, Ops);
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Chain = SDOperand(ResNode, 0);
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InFlag = SDOperand(ResNode, 1);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 0, Chain.Val, Chain.ResNo);
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SelectionDAG::InsertISelMapEntry(CodeGenMap, N.Val, 1, InFlag.Val, InFlag.ResNo);
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Result = SDOperand(ResNode, N.ResNo);
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return;
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}
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std::cerr << "Cannot yet select: ";
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N.Val->dump(CurDAG);
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std::cerr << '\n';
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abort();
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}
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/// createPPCISelDag - This pass converts a legalized DAG into a
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/// createPPCISelDag - This pass converts a legalized DAG into a
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/// PowerPC-specific DAG, ready for instruction scheduling.
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/// PowerPC-specific DAG, ready for instruction scheduling.
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///
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///
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