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ARM assembly parsing and encoding for BLX (immediate).

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Add parsing support for BLX (immediate). Since the register operand version is
predicated and the label operand version is not, we have to use some special
handling to get the operand list right for matching.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136406 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-28 21:57:55 +00:00
parent d1e38dfb8d
commit cf121c35c4
3 changed files with 16 additions and 3 deletions
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4
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1639,9 +1639,9 @@ let isBranch = 1, isTerminator = 1 in {
}
// BLX (immediate) -- for disassembly only
// BLX (immediate)
def BLXi : AXI<(outs), (ins br_target:$target), BrMiscFrm, NoItinerary,
"blx\t$target", [/* pattern left blank */]>,
"blx\t$target", []>,
Requires<[IsARM, HasV5T]> {
let Inst{31-25} = 0b1111101;
bits<25> target;

11
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -2675,6 +2675,17 @@ bool ARMAsmParser::ParseInstruction(StringRef Name, SMLoc NameLoc,
delete Op;
}
// ARM mode 'blx' need special handling, as the register operand version
// is predicable, but the label operand version is not. So, we can't rely
// on the Mnemonic based checking to correctly figure out when to put
// a CondCode operand in the list. If we're trying to match the label
// version, remove the CondCode operand here.
if (!isThumb() && Mnemonic == "blx" && Operands.size() == 3 &&
static_cast<ARMOperand*>(Operands[2])->isImm()) {
ARMOperand *Op = static_cast<ARMOperand*>(Operands[1]);
Operands.erase(Operands.begin() + 1);
delete Op;
}
return false;
}

4
test/MC/ARM/basic-arm-instructions.s
View File

@ -358,10 +358,12 @@ Lforward:
@------------------------------------------------------------------------------
bl _bar
@ FIXME: blx _bar
blx _bar
@ CHECK: bl _bar @ encoding: [A,A,A,0xeb]
@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@ CHECK: blx _bar @ encoding: [A,A,A,0xfa]
@ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbranch
@------------------------------------------------------------------------------
@ BLX (register)