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More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes 2010-06-12 01:53:48 +00:00
parent 7be0d2c8e9
commit cf125d02a0
3 changed files with 80 additions and 0 deletions
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16
lib/Target/X86/X86InstrSSE.td
View File

@ -768,6 +768,22 @@ multiclass basic_sse12_fp_binop_rm<bits<8> opc, string OpcodeStr,
!strconcat(OpcodeStr, "pd\t{$src2, $dst|$dst, $src2}"),
[(set VR128:$dst, (OpNode VR128:$src1, (memopv2f64 addr:$src2)))]>;
def V#NAME#PSrm : VPSI<opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, f128mem:$src2),
!strconcat(OpcodeStr,
"ps\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []> {
let Constraints = "";
let isAsmParserOnly = 1;
}
def V#NAME#PDrm : VPDI<opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, f128mem:$src2),
!strconcat(OpcodeStr,
"pd\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []> {
let Constraints = "";
let isAsmParserOnly = 1;
}
// Intrinsic operation, reg+reg.
def SSrr_Int : SSI<opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2),

32
test/MC/AsmParser/X86/x86_32-encoding.s
View File

@ -10148,3 +10148,35 @@ pshufb CPI1_0(%rip), %xmm1
// CHECK: vdivpd %xmm4, %xmm6, %xmm2
// CHECK: encoding: [0xc5,0xc9,0x5e,0xd4]
vdivpd %xmm4, %xmm6, %xmm2
// CHECK: vaddps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe8,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde]
vaddps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vsubps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe8,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde]
vsubps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vmulps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe8,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde]
vmulps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vdivps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe8,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde]
vdivps 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vaddpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe9,0x58,0xac,0xcb,0xef,0xbe,0xad,0xde]
vaddpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vsubpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe9,0x5c,0xac,0xcb,0xef,0xbe,0xad,0xde]
vsubpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vmulpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe9,0x59,0xac,0xcb,0xef,0xbe,0xad,0xde]
vmulpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: vdivpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
// CHECK: encoding: [0xc5,0xe9,0x5e,0xac,0xcb,0xef,0xbe,0xad,0xde]
vdivpd 3735928559(%ebx,%ecx,8), %xmm2, %xmm5

32
test/MC/AsmParser/X86/x86_64-encoding.s
View File

@ -199,3 +199,35 @@ vmulpd %xmm10, %xmm11, %xmm15
// CHECK: vdivpd %xmm10, %xmm11, %xmm15
// CHECK: encoding: [0xc4,0x41,0x21,0x5e,0xfa]
vdivpd %xmm10, %xmm11, %xmm15
// CHECK: vaddps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x28,0x58,0x5c,0xd9,0xfc]
vaddps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vsubps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x28,0x5c,0x5c,0xd9,0xfc]
vsubps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vmulps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x28,0x59,0x5c,0xd9,0xfc]
vmulps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vdivps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x28,0x5e,0x5c,0xd9,0xfc]
vdivps -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vaddpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x29,0x58,0x5c,0xd9,0xfc]
vaddpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vsubpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x29,0x5c,0x5c,0xd9,0xfc]
vsubpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vmulpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x29,0x59,0x5c,0xd9,0xfc]
vmulpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11
// CHECK: encoding: [0xc5,0x29,0x5e,0x5c,0xd9,0xfc]
vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11