diff --git a/lib/Target/Hexagon/Hexagon.h b/lib/Target/Hexagon/Hexagon.h index 6e2ecaf57e4..d360be2aa5b 100644 --- a/lib/Target/Hexagon/Hexagon.h +++ b/lib/Target/Hexagon/Hexagon.h @@ -15,50 +15,6 @@ #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGON_H #define LLVM_LIB_TARGET_HEXAGON_HEXAGON_H -#include "MCTargetDesc/HexagonMCTargetDesc.h" -#include "llvm/Target/TargetLowering.h" -#include "llvm/Target/TargetMachine.h" - -namespace llvm { - class FunctionPass; - class HexagonAsmPrinter; - class HexagonTargetMachine; - class MachineInstr; - class MCInst; - class ModulePass; - class raw_ostream; - class TargetMachine; - - FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM, - CodeGenOpt::Level OptLevel); - FunctionPass *createHexagonDelaySlotFillerPass(const TargetMachine &TM); - FunctionPass *createHexagonFPMoverPass(const TargetMachine &TM); - FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM); - FunctionPass *createHexagonCFGOptimizer(); - - FunctionPass *createHexagonSplitConst32AndConst64(); - FunctionPass *createHexagonExpandPredSpillCode(); - FunctionPass *createHexagonHardwareLoops(); - FunctionPass *createHexagonPeephole(); - FunctionPass *createHexagonFixupHwLoops(); - FunctionPass *createHexagonNewValueJump(); - FunctionPass *createHexagonCopyToCombine(); - FunctionPass *createHexagonPacketizer(); - FunctionPass *createHexagonNewValueJump(); - -/* TODO: object output. - MCCodeEmitter *createHexagonMCCodeEmitter(const Target &, - const TargetMachine &TM, - MCContext &Ctx); -*/ -/* TODO: assembler input. - TargetAsmBackend *createHexagonAsmBackend(const Target &, - const std::string &); -*/ - void HexagonLowerToMC(MachineInstr const *MI, MCInst &MCI, - HexagonAsmPrinter &AP); -} // end namespace llvm; - #define Hexagon_POINTER_SIZE 4 #define Hexagon_PointerSize (Hexagon_POINTER_SIZE) @@ -75,7 +31,7 @@ namespace llvm { // Maximum number of words and instructions in a packet. #define HEXAGON_PACKET_SIZE 4 - +#define HEXAGON_MAX_PACKET_SIZE (HEXAGON_PACKET_SIZE * HEXAGON_INSTR_SIZE) // Minimum number of instructions in an end-loop packet. #define HEXAGON_PACKET_INNER_SIZE 2 #define HEXAGON_PACKET_OUTER_SIZE 3 @@ -83,4 +39,25 @@ namespace llvm { // including a compound one or a duplex or an extender. #define HEXAGON_PRESHUFFLE_PACKET_SIZE (HEXAGON_PACKET_SIZE + 3) +// Name of the global offset table as defined by the Hexagon ABI +#define HEXAGON_GOT_SYM_NAME "_GLOBAL_OFFSET_TABLE_" + +#include "MCTargetDesc/HexagonMCTargetDesc.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetMachine.h" + +namespace llvm { + class MachineInstr; + class MCInst; + class MCInstrInfo; + class HexagonAsmPrinter; + class HexagonTargetMachine; + + void HexagonLowerToMC(const MachineInstr *MI, MCInst &MCI, + HexagonAsmPrinter &AP); + + /// \brief Creates a Hexagon-specific Target Transformation Info pass. + ImmutablePass *createHexagonTargetTransformInfoPass(const HexagonTargetMachine *TM); +} // end namespace llvm; + #endif diff --git a/lib/Target/Hexagon/HexagonCFGOptimizer.cpp b/lib/Target/Hexagon/HexagonCFGOptimizer.cpp index 703e691e612..3753b745657 100644 --- a/lib/Target/Hexagon/HexagonCFGOptimizer.cpp +++ b/lib/Target/Hexagon/HexagonCFGOptimizer.cpp @@ -28,6 +28,7 @@ using namespace llvm; #define DEBUG_TYPE "hexagon_cfg" namespace llvm { + FunctionPass *createHexagonCFGOptimizer(); void initializeHexagonCFGOptimizerPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/lib/Target/Hexagon/HexagonCopyToCombine.cpp index 1d6455c66fa..9fd863f6e15 100644 --- a/lib/Target/Hexagon/HexagonCopyToCombine.cpp +++ b/lib/Target/Hexagon/HexagonCopyToCombine.cpp @@ -49,6 +49,7 @@ MaxNumOfInstsBetweenNewValueStoreAndTFR("max-num-inst-between-tfr-and-nv-store", "consider the store still to be newifiable")); namespace llvm { + FunctionPass *createHexagonCopyToCombine(); void initializeHexagonCopyToCombinePass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp index 40059fb2737..e4c8d8f7b28 100644 --- a/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp +++ b/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp @@ -41,6 +41,7 @@ using namespace llvm; namespace llvm { + FunctionPass *createHexagonExpandPredSpillCode(); void initializeHexagonExpandPredSpillCodePass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonFixupHwLoops.cpp b/lib/Target/Hexagon/HexagonFixupHwLoops.cpp index 3d786a92b9e..d0c7f9c8960 100644 --- a/lib/Target/Hexagon/HexagonFixupHwLoops.cpp +++ b/lib/Target/Hexagon/HexagonFixupHwLoops.cpp @@ -30,6 +30,7 @@ static cl::opt MaxLoopRange( cl::desc("Restrict range of loopN instructions (testing only)")); namespace llvm { + FunctionPass *createHexagonFixupHwLoops(); void initializeHexagonFixupHwLoopsPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/lib/Target/Hexagon/HexagonHardwareLoops.cpp index db72899388e..53b6bf617e8 100644 --- a/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -63,6 +63,7 @@ static cl::opt HWCreatePreheader("hexagon-hwloop-preheader", STATISTIC(NumHWLoops, "Number of loops converted to hardware loops"); namespace llvm { + FunctionPass *createHexagonHardwareLoops(); void initializeHexagonHardwareLoopsPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonNewValueJump.cpp b/lib/Target/Hexagon/HexagonNewValueJump.cpp index 81af4db912c..707bfdbb6ab 100644 --- a/lib/Target/Hexagon/HexagonNewValueJump.cpp +++ b/lib/Target/Hexagon/HexagonNewValueJump.cpp @@ -60,6 +60,7 @@ static cl::opt DisableNewValueJumps("disable-nvjump", cl::Hidden, cl::desc("Disable New Value Jumps")); namespace llvm { + FunctionPass *createHexagonNewValueJump(); void initializeHexagonNewValueJumpPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonPeephole.cpp b/lib/Target/Hexagon/HexagonPeephole.cpp index 503bfdb6b3e..93dcbe233b2 100644 --- a/lib/Target/Hexagon/HexagonPeephole.cpp +++ b/lib/Target/Hexagon/HexagonPeephole.cpp @@ -75,6 +75,7 @@ static cl::opt DisableOptExtTo64("disable-hexagon-opt-ext-to-64", cl::desc("Disable Optimization of extensions to i64.")); namespace llvm { + FunctionPass *createHexagonPeephole(); void initializeHexagonPeepholePass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonRemoveSZExtArgs.cpp b/lib/Target/Hexagon/HexagonRemoveSZExtArgs.cpp index 0c240750886..7069ad36e21 100644 --- a/lib/Target/Hexagon/HexagonRemoveSZExtArgs.cpp +++ b/lib/Target/Hexagon/HexagonRemoveSZExtArgs.cpp @@ -24,6 +24,7 @@ using namespace llvm; namespace llvm { + FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM); void initializeHexagonRemoveExtendArgsPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp b/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp index 4efb5f75af6..d3eb56f4ba0 100644 --- a/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp +++ b/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp @@ -45,6 +45,11 @@ using namespace llvm; #define DEBUG_TYPE "xfer" +namespace llvm { + FunctionPass *createHexagonSplitConst32AndConst64(); + void initializeHexagonSplitConst32AndConst64Pass(PassRegistry&); +} + namespace { class HexagonSplitConst32AndConst64 : public MachineFunctionPass { diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index 1629118431f..a173a808783 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -61,7 +61,23 @@ SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler", namespace llvm { FunctionPass *createHexagonExpandCondsets(); -} + FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM, + CodeGenOpt::Level OptLevel); + FunctionPass *createHexagonDelaySlotFillerPass(const TargetMachine &TM); + FunctionPass *createHexagonFPMoverPass(const TargetMachine &TM); + FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM); + FunctionPass *createHexagonCFGOptimizer(); + + FunctionPass *createHexagonSplitConst32AndConst64(); + FunctionPass *createHexagonExpandPredSpillCode(); + FunctionPass *createHexagonHardwareLoops(); + FunctionPass *createHexagonPeephole(); + FunctionPass *createHexagonFixupHwLoops(); + FunctionPass *createHexagonNewValueJump(); + FunctionPass *createHexagonCopyToCombine(); + FunctionPass *createHexagonPacketizer(); + FunctionPass *createHexagonNewValueJump(); +} // end namespace llvm; /// HexagonTargetMachine ctor - Create an ILP32 architecture model. /// diff --git a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index 0cc59bcc767..474a7b912ab 100644 --- a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -57,6 +57,7 @@ static cl::opt PacketizeVolatiles("hexagon-packetize-volatiles", cl::desc("Allow non-solo packetization of volatile memory references")); namespace llvm { + FunctionPass *createHexagonPacketizer(); void initializeHexagonPacketizerPass(PassRegistry&); } diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h b/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h index 9aa258cee4c..2a154da26c5 100644 --- a/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h +++ b/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h @@ -44,8 +44,6 @@ public: uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB, MCInst const &MCI) const; - MCSubtargetInfo const &getSubtargetInfo() const; - void encodeInstruction(MCInst const &MI, raw_ostream &OS, SmallVectorImpl &Fixups, MCSubtargetInfo const &STI) const override; @@ -65,10 +63,6 @@ public: unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, SmallVectorImpl &Fixups, MCSubtargetInfo const &STI) const; - -private: - HexagonMCCodeEmitter(HexagonMCCodeEmitter const &) = delete; - void operator=(HexagonMCCodeEmitter const &) = delete; }; // class HexagonMCCodeEmitter } // namespace llvm