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fix some validation errors <it> -> <i>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59070 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -103,7 +103,7 @@ These essential documents must be read before reading this document:
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a reference manual for the LLVM assembly language
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a reference manual for the LLVM assembly language
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</li>
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</li>
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<li>
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<li>
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<it><a href="http://www.llvm.org/docs/CodeGenerator.html">The LLVM Target-Independent Code Generator </a></it> -
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<i><a href="http://www.llvm.org/docs/CodeGenerator.html">The LLVM Target-Independent Code Generator </a></i> -
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a guide to the components (classes and code generation algorithms) for translating
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a guide to the components (classes and code generation algorithms) for translating
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the LLVM internal representation to the machine code for a specified target.
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the LLVM internal representation to the machine code for a specified target.
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Pay particular attention to the descriptions of code generation stages:
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Pay particular attention to the descriptions of code generation stages:
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@@ -112,24 +112,24 @@ Register Allocation, Prolog/Epilog Code Insertion, Late Machine Code Optimizatio
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and Code Emission.
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and Code Emission.
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</li>
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</li>
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<li>
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<li>
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<it><a href="http://www.llvm.org/docs/TableGenFundamentals.html">TableGen Fundamentals</a></it> -
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<i><a href="http://www.llvm.org/docs/TableGenFundamentals.html">TableGen Fundamentals</a></i> -
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a document that describes the TableGen (tblgen) application that manages domain-specific
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a document that describes the TableGen (tblgen) application that manages domain-specific
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information to support LLVM code generation. TableGen processes input from a
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information to support LLVM code generation. TableGen processes input from a
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target description file (.td suffix) and generates C++ code that can be used
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target description file (.td suffix) and generates C++ code that can be used
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for code generation.
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for code generation.
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</li>
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</li>
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<li>
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<li>
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<it><a href="http://www.llvm.org/docs/WritingAnLLVMPass.html">Writing an LLVM Pass</a></it> -
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<i><a href="http://www.llvm.org/docs/WritingAnLLVMPass.html">Writing an LLVM Pass</a></i> -
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The assembly printer is a FunctionPass, as are several SelectionDAG processing steps.
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The assembly printer is a FunctionPass, as are several SelectionDAG processing steps.
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</li>
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</li>
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</ul>
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</ul>
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To follow the SPARC examples in this document, have a copy of
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To follow the SPARC examples in this document, have a copy of
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<it><a href="http://www.sparc.org/standards/V8.pdf">The SPARC Architecture Manual, Version 8</a></it>
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<i><a href="http://www.sparc.org/standards/V8.pdf">The SPARC Architecture Manual, Version 8</a></i>
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for reference. For details about the ARM instruction set, refer to the
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for reference. For details about the ARM instruction set, refer to the
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<it><a href="http://infocenter.arm.com/">ARM Architecture Reference Manual</a></it>
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<i><a href="http://infocenter.arm.com/">ARM Architecture Reference Manual</a></i>
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For more about the GNU Assembler format (GAS), see
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For more about the GNU Assembler format (GAS), see
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<it><a href="http://sourceware.org/binutils/docs/as/index.html">Using As</a></it>
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<i><a href="http://sourceware.org/binutils/docs/as/index.html">Using As</a></i>
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especially for the assembly printer. <it>Using As</it> contains lists of target machine dependent features.
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especially for the assembly printer. <i>Using As</i> contains lists of target machine dependent features.
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</div>
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</div>
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<div class="doc_subsection">
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<div class="doc_subsection">
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