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Create a isFullCopy predicate.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2011-06-30 21:15:52 +00:00
parent 77a2c372fa
commit cfe5254cd3
2 changed files with 4 additions and 5 deletions
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3
include/llvm/CodeGen/MachineInstr.h
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@ -278,6 +278,9 @@ public:
bool isCopy() const {
return getOpcode() == TargetOpcode::COPY;
}
bool isFullCopy() const {
return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg();
}
/// isCopyLike - Return true if the instruction behaves like a copy.
/// This does not include native copy instructions.

6
lib/CodeGen/InlineSpiller.cpp
View File

@ -180,11 +180,7 @@ Spiller *createInlineSpiller(MachineFunctionPass &pass,
/// isFullCopyOf - If MI is a COPY to or from Reg, return the other register,
/// otherwise return 0.
static unsigned isFullCopyOf(const MachineInstr *MI, unsigned Reg) {
if (!MI->isCopy())
return 0;
if (MI->getOperand(0).getSubReg() != 0)
return 0;
if (MI->getOperand(1).getSubReg() != 0)
if (!MI->isFullCopy())
return 0;
if (MI->getOperand(0).getReg() == Reg)
return MI->getOperand(1).getReg();