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InstCombine: Allow folding of xor into icmp by changing the predicate for vectors

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The loop vectorizer can create this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228954 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-02-12 20:26:46 +00:00
parent 00481c20de
commit d038a7fe67
2 changed files with 10 additions and 3 deletions
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7
lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
View File

@ -2604,15 +2604,16 @@ Instruction *InstCombiner::visitXor(BinaryOperator &I) {
}
}
if (ConstantInt *RHS = dyn_cast<ConstantInt>(Op1)) {
if (RHS->isOne() && Op0->hasOneUse())
if (Constant *RHS = dyn_cast<Constant>(Op1)) {
if (RHS->isAllOnesValue() && Op0->hasOneUse())
// xor (cmp A, B), true = not (cmp A, B) = !cmp A, B
if (CmpInst *CI = dyn_cast<CmpInst>(Op0))
return CmpInst::Create(CI->getOpcode(),
CI->getInversePredicate(),
CI->getOperand(0), CI->getOperand(1));
}
if (ConstantInt *RHS = dyn_cast<ConstantInt>(Op1)) {
// fold (xor(zext(cmp)), 1) and (xor(sext(cmp)), -1) to ext(!cmp).
if (CastInst *Op0C = dyn_cast<CastInst>(Op0)) {
if (CmpInst *CI = dyn_cast<CmpInst>(Op0C->getOperand(0))) {

6
test/Transforms/InstCombine/not.ll
View File

@ -52,3 +52,9 @@ entry:
%retval67 = zext i1 %tmp3 to i8 ; <i8> [#uses=1]
ret i8 %retval67
}
define <2 x i1> @test7(<2 x i32> %A, <2 x i32> %B) {
%cond = icmp sle <2 x i32> %A, %B
%Ret = xor <2 x i1> %cond, <i1 true, i1 true>
ret <2 x i1> %Ret
}