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Fixed some indentation in the AsmWriterInst

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implementation.  Also changed the constructor
so that it does not require a Record, making it
usable by the EDEmitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95715 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2010-02-09 23:06:35 +00:00
parent 4814e711ab
commit d0bc7f060e
4 changed files with 22 additions and 14 deletions
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6
utils/TableGen/AsmWriterEmitter.cpp
View File

@ -256,7 +256,11 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
E = Target.inst_end(); I != E; ++I) E = Target.inst_end(); I != E; ++I)
if (!I->second.AsmString.empty() && if (!I->second.AsmString.empty() &&
I->second.TheDef->getName() != "PHI") I->second.TheDef->getName() != "PHI")
Instructions.push_back(AsmWriterInst(I->second, AsmWriter)); Instructions.push_back(
AsmWriterInst(I->second,
AsmWriter->getValueAsInt("Variant"),
AsmWriter->getValueAsInt("FirstOperandColumn"),
AsmWriter->getValueAsInt("OperandSpacing")));
// Get the instruction numbering. // Get the instruction numbering.
Target.getInstructionsByEnumValue(NumberedInstructions); Target.getInstructionsByEnumValue(NumberedInstructions);

24
utils/TableGen/AsmWriterInst.cpp
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@ -46,13 +46,12 @@ std::string AsmWriterOperand::getCode() const {
/// ParseAsmString - Parse the specified Instruction's AsmString into this /// ParseAsmString - Parse the specified Instruction's AsmString into this
/// AsmWriterInst. /// AsmWriterInst.
/// ///
AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, Record *AsmWriter) { AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI,
unsigned Variant,
int FirstOperandColumn,
int OperandSpacing) {
this->CGI = &CGI; this->CGI = &CGI;
unsigned Variant = AsmWriter->getValueAsInt("Variant");
int FirstOperandColumn = AsmWriter->getValueAsInt("FirstOperandColumn");
int OperandSpacing = AsmWriter->getValueAsInt("OperandSpacing");
unsigned CurVariant = ~0U; // ~0 if we are outside a {.|.|.} region, other #. unsigned CurVariant = ~0U; // ~0 if we are outside a {.|.|.} region, other #.
// This is the number of tabs we've seen if we're doing columnar layout. // This is the number of tabs we've seen if we're doing columnar layout.
@ -88,9 +87,10 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, Record *AsmWriter) {
unsigned DestColumn = FirstOperandColumn + unsigned DestColumn = FirstOperandColumn +
CurColumn++ * OperandSpacing; CurColumn++ * OperandSpacing;
Operands.push_back( Operands.push_back(
AsmWriterOperand("O.PadToColumn(" + AsmWriterOperand(
utostr(DestColumn) + ");\n", "O.PadToColumn(" +
AsmWriterOperand::isLiteralStatementOperand)); utostr(DestColumn) + ");\n",
AsmWriterOperand::isLiteralStatementOperand));
} }
break; break;
case '"': case '"':
@ -123,8 +123,8 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, Record *AsmWriter) {
unsigned DestColumn = FirstOperandColumn + unsigned DestColumn = FirstOperandColumn +
CurColumn++ * OperandSpacing; CurColumn++ * OperandSpacing;
Operands.push_back( Operands.push_back(
AsmWriterOperand("O.PadToColumn(" + utostr(DestColumn) + ");\n", AsmWriterOperand("O.PadToColumn(" + utostr(DestColumn) + ");\n",
AsmWriterOperand::isLiteralStatementOperand)); AsmWriterOperand::isLiteralStatementOperand));
break; break;
} else if (std::string("${|}\\").find(AsmString[DollarPos+1]) } else if (std::string("${|}\\").find(AsmString[DollarPos+1])
!= std::string::npos) { != std::string::npos) {
@ -236,7 +236,7 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, Record *AsmWriter) {
} }
Operands.push_back(AsmWriterOperand("return;", Operands.push_back(AsmWriterOperand("return;",
AsmWriterOperand::isLiteralStatementOperand)); AsmWriterOperand::isLiteralStatementOperand));
} }
/// MatchesAllButOneOp - If this instruction is exactly identical to the /// MatchesAllButOneOp - If this instruction is exactly identical to the
@ -256,4 +256,4 @@ unsigned AsmWriterInst::MatchesAllButOneOp(const AsmWriterInst &Other)const{
} }
} }
return MismatchOperand; return MismatchOperand;
} }

5
utils/TableGen/AsmWriterInst.h
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@ -81,7 +81,10 @@ namespace llvm {
std::vector<AsmWriterOperand> Operands; std::vector<AsmWriterOperand> Operands;
const CodeGenInstruction *CGI; const CodeGenInstruction *CGI;
AsmWriterInst(const CodeGenInstruction &CGI, Record *AsmWriter); AsmWriterInst(const CodeGenInstruction &CGI,
unsigned Variant,
int FirstOperandColumn,
int OperandSpacing);
/// MatchesAllButOneOp - If this instruction is exactly identical to the /// MatchesAllButOneOp - If this instruction is exactly identical to the
/// specified instruction except for one differing operand, return the /// specified instruction except for one differing operand, return the

1
utils/TableGen/EDEmitter.cpp
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@ -15,6 +15,7 @@
#include "EDEmitter.h" #include "EDEmitter.h"
#include "AsmWriterInst.h"
#include "CodeGenTarget.h" #include "CodeGenTarget.h"
#include "Record.h" #include "Record.h"