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Start sketching out ARM fast-isel calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113662 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15,6 +15,7 @@
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#include "ARM.h"
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#include "ARM.h"
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#include "ARMBaseInstrInfo.h"
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#include "ARMBaseInstrInfo.h"
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#include "ARMCallingConv.h"
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#include "ARMRegisterInfo.h"
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#include "ARMRegisterInfo.h"
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#include "ARMTargetMachine.h"
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#include "ARMTargetMachine.h"
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#include "ARMSubtarget.h"
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#include "ARMSubtarget.h"
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@ -135,13 +136,19 @@ class ARMFastISel : public FastISel {
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unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg);
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unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg);
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unsigned ARMMoveToIntReg(EVT VT, unsigned SrcReg);
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unsigned ARMMoveToIntReg(EVT VT, unsigned SrcReg);
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// Call handling routines.
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private:
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CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool Return);
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// OptionalDef handling routines.
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private:
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bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
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bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
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const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
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const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
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};
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};
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} // end anonymous namespace
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} // end anonymous namespace
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// #include "ARMGenCallingConv.inc"
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#include "ARMGenCallingConv.inc"
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// DefinesOptionalPredicate - This is different from DefinesPredicate in that
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// DefinesOptionalPredicate - This is different from DefinesPredicate in that
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// we don't care about implicit defs here, just places we'll need to add a
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// we don't care about implicit defs here, just places we'll need to add a
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@ -895,6 +902,35 @@ bool ARMFastISel::ARMSelectBinaryOp(const Instruction *I, unsigned ISDOpcode) {
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return true;
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return true;
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}
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}
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// Call Handling Code
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// This is largely taken directly from CCAssignFnForNode - we don't support
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// varargs in FastISel so that part has been removed.
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// TODO: We may not support all of this.
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CCAssignFn *ARMFastISel::CCAssignFnForCall(CallingConv::ID CC, bool Return) {
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switch (CC) {
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default:
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llvm_unreachable("Unsupported calling convention");
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case CallingConv::C:
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case CallingConv::Fast:
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// Use target triple & subtarget features to do actual dispatch.
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if (Subtarget->isAAPCS_ABI()) {
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if (Subtarget->hasVFP2() &&
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FloatABIType == FloatABI::Hard)
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return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP);
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else
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return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS);
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} else
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return (Return ? RetCC_ARM_APCS: CC_ARM_APCS);
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case CallingConv::ARM_AAPCS_VFP:
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return (Return ? RetCC_ARM_AAPCS_VFP: CC_ARM_AAPCS_VFP);
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case CallingConv::ARM_AAPCS:
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return (Return ? RetCC_ARM_AAPCS: CC_ARM_AAPCS);
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case CallingConv::ARM_APCS:
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return (Return ? RetCC_ARM_APCS: CC_ARM_APCS);
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}
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}
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// TODO: SoftFP support.
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// TODO: SoftFP support.
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bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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// No Thumb-1 for now.
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// No Thumb-1 for now.
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