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Variable cleanup. Based on past patch submittals variable names have
been normalized and more descriptive comments added. Patch by Reed Kotler and Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -14,77 +14,82 @@
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namespace llvm {
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namespace Mips {
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enum Fixups {
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// fixup_Mips_xxx - R_MIPS_NONE
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fixup_Mips_NONE = FirstTargetFixupKind,
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// Although most of the current fixup types reflect a unique relocation
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// one can have multiple fixup types for a given relocation and thus need
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// to be uniquely named.
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//
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// This table *must* be in the save order of
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// MCFixupKindInfo Infos[Mips::NumTargetFixupKinds]
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// in MipsAsmBackend.cpp.
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//
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enum Fixups {
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// Branch fixups resulting in R_MIPS_16.
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fixup_Mips_16 = FirstTargetFixupKind,
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// fixup_Mips_xxx - R_MIPS_16.
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fixup_Mips_16,
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// Pure 32 bit data fixup resulting in - R_MIPS_32.
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fixup_Mips_32,
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// fixup_Mips_xxx - R_MIPS_32.
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fixup_Mips_32,
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// Full 32 bit data relative data fixup resulting in - R_MIPS_REL32.
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fixup_Mips_REL32,
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// fixup_Mips_xxx - R_MIPS_REL32.
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fixup_Mips_REL32,
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// Jump 26 bit fixup resulting in - R_MIPS_26.
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fixup_Mips_26,
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// fixup_Mips_xxx - R_MIPS_26.
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fixup_Mips_26,
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// Pure upper 16 bit fixup resulting in - R_MIPS_HI16.
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fixup_Mips_HI16,
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// fixup_Mips_xxx - R_MIPS_HI16.
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fixup_Mips_HI16,
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// Pure lower 16 bit fixup resulting in - R_MIPS_LO16.
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fixup_Mips_LO16,
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// fixup_Mips_xxx - R_MIPS_LO16.
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fixup_Mips_LO16,
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// 16 bit fixup for GP offest resulting in - R_MIPS_GPREL16.
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fixup_Mips_GPREL16,
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// fixup_Mips_xxx - R_MIPS_GPREL16.
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fixup_Mips_GPREL16,
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// 16 bit literal fixup resulting in - R_MIPS_LITERAL.
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fixup_Mips_LITERAL,
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// fixup_Mips_xxx - R_MIPS_LITERAL.
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fixup_Mips_LITERAL,
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// Global symbol fixup resulting in - R_MIPS_GOT16.
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fixup_Mips_GOT_Global,
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// Global symbol fixup resulting in - R_MIPS_GOT16.
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fixup_Mips_GOT_Global,
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// Local symbol fixup resulting in - R_MIPS_GOT16.
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fixup_Mips_GOT_Local,
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// Local symbol fixup resulting in - R_MIPS_GOT16.
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fixup_Mips_GOT_Local,
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// PC relative branch fixup resulting in - R_MIPS_PC16.
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fixup_Mips_PC16,
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// fixup_Mips_xxx - R_MIPS_PC16.
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fixup_Mips_PC16,
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// resulting in - R_MIPS_CALL16.
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fixup_Mips_CALL16,
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// fixup_Mips_xxx - R_MIPS_CALL16.
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fixup_Mips_CALL16,
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// resulting in - R_MIPS_GPREL32.
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fixup_Mips_GPREL32,
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// fixup_Mips_xxx - R_MIPS_GPREL32.
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fixup_Mips_GPREL32,
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// resulting in - R_MIPS_SHIFT5.
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fixup_Mips_SHIFT5,
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// fixup_Mips_xxx - R_MIPS_SHIFT5.
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fixup_Mips_SHIFT5,
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// resulting in - R_MIPS_SHIFT6.
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fixup_Mips_SHIFT6,
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// fixup_Mips_xxx - R_MIPS_SHIFT6.
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fixup_Mips_SHIFT6,
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// Pure 64 bit data fixup resulting in - R_MIPS_64.
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fixup_Mips_64,
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// fixup_Mips_xxx - R_MIPS_64.
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fixup_Mips_64,
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// resulting in - R_MIPS_TLS_GD.
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fixup_Mips_TLSGD,
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// fixup_Mips_xxx - R_MIPS_TLS_GD.
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fixup_Mips_TLSGD,
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// resulting in - R_MIPS_TLS_GOTTPREL.
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fixup_Mips_GOTTPREL,
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// fixup_Mips_xxx - R_MIPS_TLS_GOTTPREL.
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fixup_Mips_GOTTPREL,
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// resulting in - R_MIPS_TLS_TPREL_HI16.
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fixup_Mips_TPREL_HI,
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// fixup_Mips_xxx - R_MIPS_TLS_TPREL_HI16.
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fixup_Mips_TPREL_HI,
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// resulting in - R_MIPS_TLS_TPREL_LO16.
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fixup_Mips_TPREL_LO,
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// fixup_Mips_xxx - R_MIPS_TLS_TPREL_LO16.
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fixup_Mips_TPREL_LO,
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// PC relative branch fixup resulting in - R_MIPS_PC16
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fixup_Mips_Branch_PCRel,
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// fixup_Mips_xxx - yyy. // This should become R_MIPS_PC16
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fixup_Mips_Branch_PCRel,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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} // namespace Mips
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} // namespace llvm
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@ -248,8 +248,8 @@ unsigned
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MipsMCCodeEmitter::getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups) const {
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assert(MI.getOperand(OpNo).isImm());
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unsigned szEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
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return szEncoding - 1;
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unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
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return SizeEncoding - 1;
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}
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// FIXME: should be called getMSBEncoding
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@ -259,10 +259,10 @@ MipsMCCodeEmitter::getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups) const {
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assert(MI.getOperand(OpNo-1).isImm());
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assert(MI.getOperand(OpNo).isImm());
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unsigned pos = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);
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unsigned sz = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
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unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);
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unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
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return pos + sz - 1;
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return Position + Size - 1;
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}
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#include "MipsGenMCCodeEmitter.inc"
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