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Fix undefined behavior (left shift of negative value) in SystemZ backend.

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This bug is reported by UBSan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216131 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov 2014-08-20 21:56:43 +00:00
parent dac67649f2
commit d1e3fcf347
2 changed files with 3 additions and 7 deletions
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2
lib/Target/SystemZ/SystemZFrameLowering.cpp
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@ -294,7 +294,7 @@ static void emitIncrement(MachineBasicBlock &MBB,
else {
Opcode = SystemZ::AGFI;
// Make sure we maintain 8-byte stack alignment.
int64_t MinVal = -int64_t(1) << 31;
int64_t MinVal = -uint64_t(1) << 31;
int64_t MaxVal = (int64_t(1) << 31) - 8;
if (ThisVal < MinVal)
ThisVal = MinVal;

8
lib/Target/SystemZ/SystemZISelLowering.cpp
View File

@ -2800,14 +2800,10 @@ SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI,
unsigned Tmp = MRI.createVirtualRegister(RC);
BuildMI(MBB, DL, TII->get(BinOpcode), Tmp)
.addReg(RotatedOldVal).addOperand(Src2);
if (BitSize < 32)
if (BitSize <= 32)
// XILF with the upper BitSize bits set.
BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
.addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize)));
else if (BitSize == 32)
// XILF with every bit set.
BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal)
.addReg(Tmp).addImm(~uint32_t(0));
.addReg(Tmp).addImm(-1U << (32 - BitSize));
else {
// Use LCGR and add -1 to the result, which is more compact than
// an XILF, XILH pair.