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[Hexagon] Don't mark callee saved registers as clobbered by a tail call

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This was causing unnecessary spills/restores of callee saved registers.

Fixes PR13572.

Patch by Pranav Bhandarkar!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161778 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Arnold Schwaighofer 2012-08-13 19:54:01 +00:00
parent 2e018f1cf6
commit d252aa43c9
2 changed files with 17 additions and 9 deletions
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12
lib/Target/Hexagon/HexagonInstrInfo.td
View File

@ -2580,22 +2580,16 @@ let isCall = 1, neverHasSideEffects = 1,
}
// Tail Calls.
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1,
Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10,
R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in {
def TCRETURNtg : JInst<(outs), (ins calltarget:$dst),
"jump $dst // TAILCALL", []>;
}
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1,
Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10,
R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in {
def TCRETURNtext : JInst<(outs), (ins calltarget:$dst),
"jump $dst // TAILCALL", []>;
}
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1,
Defs = [D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10,
R22, R23, R28, R31, P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1 in {
def TCRETURNR : JInst<(outs), (ins IntRegs:$dst),
"jumpr $dst // TAILCALL", []>;
}

14
test/CodeGen/Hexagon/simpletailcall.ll Normal file
View File

@ -0,0 +1,14 @@
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: foo_empty
; CHECK-NOT: allocframe
; CHECK-NOT: memd(r29
; CHECK: jump bar_empty
define void @foo_empty(i32 %h) nounwind {
entry:
%add = add nsw i32 %h, 3
%call = tail call i32 bitcast (i32 (...)* @bar_empty to i32 (i32)*)(i32 %add) nounwind
ret void
}
declare i32 @bar_empty(...)