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Pseudo-ize tBX_RET and tBX_RET_vararg.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134739 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-08 21:10:35 +00:00
parent 75ca4b94bd
commit d28ec08edd
1 changed files with 5 additions and 16 deletions
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21
lib/Target/ARM/ARMInstrThumb.td
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@ -385,24 +385,13 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
}
let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
def tBX_RET : TI<(outs), (ins), IIC_Br, "bx\tlr",
[(ARMretflag)]>,
T1Special<{1,1,0,?}> {
// A6.2.3 & A8.6.25
let Inst{6-3} = 0b1110; // Rm = lr
let Inst{2-0} = 0b000;
}
def tBX_RET : tPseudoExpand<(outs), (ins), Size2Bytes, IIC_Br,
[(ARMretflag)], (tBX LR, (ops 14, zero_reg))>;
// Alternative return instruction used by vararg functions.
def tBX_RET_vararg : TI<(outs), (ins tGPR:$Rm),
IIC_Br, "bx\t$Rm",
[]>,
T1Special<{1,1,0,?}> {
// A6.2.3 & A8.6.25
bits<4> Rm;
let Inst{6-3} = Rm;
let Inst{2-0} = 0b000;
}
def tBX_RET_vararg : tPseudoExpand<(outs), (ins tGPR:$Rm),
Size2Bytes, IIC_Br, [],
(tBX GPR:$Rm, (ops 14, zero_reg))>;
}
// All calls clobber the non-callee saved registers. SP is marked as a use to