Some Mips minor fixes

Added support for mips little endian arch => mipsel



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51923 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsAsmPrinter.cpp

@@ -547,5 +547,7 @@ doFinalization(Module &M)
     }
   }
 
+  O << "\n";
+
   return AsmPrinter::doFinalization(M);
 }

lib/Target/Mips/MipsISelLowering.cpp

@@ -365,6 +365,7 @@ LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC)
   Chain  = DAG.getNode(MipsISD::JmpLink, NodeTys, &Ops[0], Ops.size());
   InFlag = Chain.getValue(1);
 
+  // Create the CALLSEQ_END node.
   Chain = DAG.getCALLSEQ_END(Chain,
                              DAG.getConstant(NumBytes, getPointerTy()),
                              DAG.getConstant(0, getPointerTy()),
@@ -400,8 +401,6 @@ LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, unsigned CC)
       InFlag = Chain.getValue(1);
   }      
 
-  // Create the CALLSEQ_END node.
-
   // Handle result values, copying them out of physregs into vregs that we
   // return.
   return SDOperand(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo);

lib/Target/Mips/MipsInstrInfo.td

@@ -135,7 +135,6 @@ class ArithOverflowR<bits<6> op, bits<6> func, string instr_asm>:
       [], IIAlu>;
 
 // Arithmetic 2 register operands
-let isCommutable = 1 in
 class ArithI<bits<6> op, string instr_asm, SDNode OpNode,
              Operand Od, PatLeaf imm_type> :
   FI< op,

lib/Target/Mips/MipsRegisterInfo.cpp

@@ -147,7 +147,7 @@ getReservedRegs(const MachineFunction &MF) const
 //
 //  0                 ----------
 //  4                 Args to pass
-//  .                 saved $GP  (used in PIC - not supported yet)
+//  .                 saved $GP  (used in PIC)
 //  .                 Local Area
 //  .                 saved "Callee Saved" Registers
 //  .                 saved FP

lib/Target/Mips/MipsSubtarget.cpp

@@ -17,8 +17,9 @@
 using namespace llvm;
 
 MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, 
-                             const std::string &FS) : 
+                             const std::string &FS, bool little) : 
-  IsMipsIII(false)
+  IsMipsIII(false),
+  IsLittle(little)
 {
   std::string CPU = "mips1";
 

lib/Target/Mips/MipsSubtarget.h

@@ -27,14 +27,14 @@ class MipsSubtarget : public TargetSubtarget {
 protected:
 
   bool IsMipsIII;
+  bool IsLittle;
   InstrItineraryData InstrItins;
 
 public:
   /// This constructor initializes the data members to match that
   /// of the specified module.
-  ///
   MipsSubtarget(const TargetMachine &TM, const Module &M, 
-                const std::string &FS);
+                const std::string &FS, bool little);
   
   /// ParseSubtargetFeatures - Parses features string setting specified 
   /// subtarget options.  Definition of function is auto generated by tblgen.
@@ -43,6 +43,9 @@ public:
   /// isMipsIII - Return true if the selected CPU supports MipsIII ISA
   /// support. 
   bool isMipsIII() const { return IsMipsIII; }
+
+  /// isMipsIII - Return true if the target is little endian. 
+  bool isLittle() const { return IsLittle; }
 };
 } // End llvm namespace
 

lib/Target/Mips/MipsTargetMachine.cpp

@@ -21,6 +21,7 @@ using namespace llvm;
 
 // Register the target.
 static RegisterTarget<MipsTargetMachine>    X("mips", "  Mips");
+static RegisterTarget<MipselTargetMachine>  Y("mipsel", "  Mipsel");
 
 const TargetAsmInfo *MipsTargetMachine::
 createTargetAsmInfo() const 
@@ -35,11 +36,13 @@ createTargetAsmInfo() const
 // offset from the stack/frame pointer, so StackGrowsUp is used.
 // When using CodeModel::Large the behaviour 
 //
-// 
 MipsTargetMachine::
-MipsTargetMachine(const Module &M, const std::string &FS): 
+MipsTargetMachine(const Module &M, const std::string &FS, bool isLittle=false):
-  Subtarget(*this, M, FS), DataLayout("E-p:32:32:32"), 
+  Subtarget(*this, M, FS, isLittle), 
-  InstrInfo(*this), FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
+  DataLayout(isLittle ? std::string("e-p:32:32:32") :
+                        std::string("E-p:32:32:32")), 
+  InstrInfo(*this), 
+  FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0),
   TLInfo(*this) 
 {
   if (getRelocationModel() != Reloc::Static)
@@ -48,6 +51,10 @@ MipsTargetMachine(const Module &M, const std::string &FS):
     setCodeModel(CodeModel::Small);
 }
 
+MipselTargetMachine::
+MipselTargetMachine(const Module &M, const std::string &FS) :
+  MipsTargetMachine(M, FS, true) {}
+
 // return 0 and must specify -march to gen MIPS code.
 unsigned MipsTargetMachine::
 getModuleMatchQuality(const Module &M) 
@@ -60,6 +67,18 @@ getModuleMatchQuality(const Module &M)
   return 0;
 }
 
+// return 0 and must specify -march to gen MIPSel code.
+unsigned MipselTargetMachine::
+getModuleMatchQuality(const Module &M) 
+{
+  // We strongly match "mipsel-*".
+  std::string TT = M.getTargetTriple();
+  if (TT.size() >= 7 && std::string(TT.begin(), TT.begin()+7) == "mipsel-")
+    return 20;
+  
+  return 0;
+}
+
 // Install an instruction selector pass using 
 // the ISelDag to gen Mips code.
 bool MipsTargetMachine::

lib/Target/Mips/MipsTargetMachine.h

@@ -33,7 +33,7 @@ namespace llvm {
     virtual const TargetAsmInfo *createTargetAsmInfo() const;
   
   public:
-    MipsTargetMachine(const Module &M, const std::string &FS);
+    MipsTargetMachine(const Module &M, const std::string &FS, bool isLittle);
 
     virtual const MipsInstrInfo   *getInstrInfo()     const 
     { return &InstrInfo; }
@@ -60,6 +60,16 @@ namespace llvm {
     virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                     std::ostream &Out);
   };
+
+/// MipselTargetMachine - Mipsel target machine.
+///
+class MipselTargetMachine : public MipsTargetMachine {
+public:
+  MipselTargetMachine(const Module &M, const std::string &FS);
+
+  static unsigned getModuleMatchQuality(const Module &M);
+};
+
 } // End llvm namespace
 
 #endif